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| author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-11-05 17:24:07 -0800 |
|---|---|---|
| committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2013-11-05 17:24:07 -0800 |
| commit | 8d64e7a32c62d2239007fb6dcc274751c629b7f8 (patch) | |
| tree | b2aa7b01df4e54aa8b5ab5289f8361ab28af2e75 /env | |
| parent | 532db85c68d3517ed46f2d9203a3e72db5c8dec3 (diff) | |
| download | riscv-tests-8d64e7a32c62d2239007fb6dcc274751c629b7f8.zip riscv-tests-8d64e7a32c62d2239007fb6dcc274751c629b7f8.tar.gz riscv-tests-8d64e7a32c62d2239007fb6dcc274751c629b7f8.tar.bz2 | |
correctly set SR_EA bit for all vector physical tests
Diffstat (limited to 'env')
| -rw-r--r-- | env/v/riscv_test.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/env/v/riscv_test.h b/env/v/riscv_test.h index d9b23fb..20d0690 100644 --- a/env/v/riscv_test.h +++ b/env/v/riscv_test.h @@ -12,9 +12,10 @@ #define RVTEST_RV64UF \ .macro init; \ fssr x0; \ - .endm + .endm -#define RVTEST_VEC_ENABLE \ +#define RVTEST_RV64UV \ + RVTEST_RV64UF #define RVTEST_CODE_BEGIN \ .text; \ |