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| author | Tim Newsome <tim@sifive.com> | 2018-10-31 14:33:27 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2018-10-31 14:33:27 -0700 |
| commit | 8312d916002aae641cb845c0c6591bbab03b2c92 (patch) | |
| tree | a5c3bace44c55ce4cd8e07bc8d222ef6a7858edf /debug/targets/SiFive/HiFive1-flash.py | |
| parent | b3c5d7a07f2a08d11f316c39d6cce5374cdcbfd3 (diff) | |
| download | riscv-tests-8312d916002aae641cb845c0c6591bbab03b2c92.zip riscv-tests-8312d916002aae641cb845c0c6591bbab03b2c92.tar.gz riscv-tests-8312d916002aae641cb845c0c6591bbab03b2c92.tar.bz2 | |
Add HiFive1-flash target configuration.
Diffstat (limited to 'debug/targets/SiFive/HiFive1-flash.py')
| -rw-r--r-- | debug/targets/SiFive/HiFive1-flash.py | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/debug/targets/SiFive/HiFive1-flash.py b/debug/targets/SiFive/HiFive1-flash.py new file mode 100644 index 0000000..06dfcfc --- /dev/null +++ b/debug/targets/SiFive/HiFive1-flash.py @@ -0,0 +1,15 @@ +import targets + +# Like HiFive1, but put code in flash + +class HiFive1FlashHart(targets.Hart): + xlen = 32 + ram = 0x80000000 + ram_size = 16 * 1024 + instruction_hardware_breakpoint_count = 2 + misa = 0x40001105 + link_script_path = "HiFive1-flash.lds" + +class HiFive1Flash(targets.Target): + harts = [HiFive1FlashHart()] + openocd_config_path = "HiFive1.cfg" |