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| author | Tim Newsome <tim@sifive.com> | 2019-12-18 13:01:33 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-12-18 13:01:33 -0800 |
| commit | 3b357c1d01eb94a21d4cf172bd309f1a84f7ae15 (patch) | |
| tree | aa4ba467b63ffb5da315610c77fc061060fdec5b /debug/targets/RISC-V/spike32-2-hwthread.py | |
| parent | d2cbf66868ce66ae9cca22485e73d979532e428f (diff) | |
| download | riscv-tests-3b357c1d01eb94a21d4cf172bd309f1a84f7ae15.zip riscv-tests-3b357c1d01eb94a21d4cf172bd309f1a84f7ae15.tar.gz riscv-tests-3b357c1d01eb94a21d4cf172bd309f1a84f7ae15.tar.bz2 | |
Hardcode misa values for all spike targets. (#227)
`make` now takes 31s, `make all` takes 1m53s.
The new CheckMisa test ensures that the misa value specified in the
configuration is correct.
Diffstat (limited to 'debug/targets/RISC-V/spike32-2-hwthread.py')
| -rw-r--r-- | debug/targets/RISC-V/spike32-2-hwthread.py | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/debug/targets/RISC-V/spike32-2-hwthread.py b/debug/targets/RISC-V/spike32-2-hwthread.py index c5fe92d..93308fb 100644 --- a/debug/targets/RISC-V/spike32-2-hwthread.py +++ b/debug/targets/RISC-V/spike32-2-hwthread.py @@ -4,7 +4,8 @@ import testlib import spike32 # pylint: disable=import-error class spike32_2(targets.Target): - harts = [spike32.spike32_hart(), spike32.spike32_hart()] + harts = [spike32.spike32_hart(misa=0x40141129), + spike32.spike32_hart(misa=0x40141129)] openocd_config_path = "spike-2-hwthread.cfg" timeout_sec = 5 implements_custom_test = True |