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author | cgsfv <cgsfv@users.noreply.github.com> | 2018-11-13 11:56:10 +0100 |
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committer | cgsfv <cgsfv@users.noreply.github.com> | 2018-11-13 11:56:10 +0100 |
commit | 94a29da063eecda0f37f9f6a97ffb39a47825b35 (patch) | |
tree | a36865653e79e439f0dd7addce1e64599b5263d6 /debug/targets.py | |
parent | ee6c720e4db50b73dd8f45c70a6868b88cd4a8b1 (diff) | |
download | riscv-tests-94a29da063eecda0f37f9f6a97ffb39a47825b35.zip riscv-tests-94a29da063eecda0f37f9f6a97ffb39a47825b35.tar.gz riscv-tests-94a29da063eecda0f37f9f6a97ffb39a47825b35.tar.bz2 |
Added MemTestBlockReadInvalid verifying the corresponding OpenOCD fix
Diffstat (limited to 'debug/targets.py')
-rw-r--r-- | debug/targets.py | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/debug/targets.py b/debug/targets.py index 63994db..b5b7f7b 100644 --- a/debug/targets.py +++ b/debug/targets.py @@ -79,6 +79,9 @@ class Target(object): # hardware will every do that. implements_custom_test = False + # Target uses the DTM Version 0.13 for memory accesses + uses_dtm_version_013 = False + # Internal variables: directory = None temporary_files = [] |