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author | Tim Newsome <tim@sifive.com> | 2020-03-26 09:09:34 -0700 |
---|---|---|
committer | GitHub <noreply@github.com> | 2020-03-26 09:09:34 -0700 |
commit | 7351b31ffa1c72e16d2d8da3021c9ff5edbbf821 (patch) | |
tree | ad7c9434c22126edadc727449b1cf9d3e6ebb5f0 /debug/programs | |
parent | 094985d1cfafe00548751285271bf8aab40f8d6d (diff) | |
download | riscv-tests-7351b31ffa1c72e16d2d8da3021c9ff5edbbf821.zip riscv-tests-7351b31ffa1c72e16d2d8da3021c9ff5edbbf821.tar.gz riscv-tests-7351b31ffa1c72e16d2d8da3021c9ff5edbbf821.tar.bz2 |
Improve address translation tests (#261)
* Improve address translation tests.
Check that the mode we're testing is supported by hardware before
running the test.
Test with high address bits set, which catches a bug in OpenOCD.
* Turn off PMP for address translation test.
Otherwise it doesn't pass on HiFive Unleashed.
* Run TranslateTest on random hart.
Once https://github.com/riscv/riscv-openocd/pull/459 merges that will work.
Diffstat (limited to 'debug/programs')
-rw-r--r-- | debug/programs/translate.c | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/debug/programs/translate.c b/debug/programs/translate.c index ebeb92d..c0424bf 100644 --- a/debug/programs/translate.c +++ b/debug/programs/translate.c @@ -23,6 +23,7 @@ typedef struct { unsigned ppn_offset_bits[5]; unsigned entry_width_bytes; unsigned vpn_width_bits; + unsigned vaddr_bits; } virtual_memory_system_t; static virtual_memory_system_t sv32 = { @@ -31,7 +32,8 @@ static virtual_memory_system_t sv32 = { .ppn_width_bits = {12, 10, 10}, .ppn_offset_bits = {0, 12, 22}, .entry_width_bytes = 4, - .vpn_width_bits = 10 + .vpn_width_bits = 10, + .vaddr_bits = 32 }; static virtual_memory_system_t sv39 = { @@ -40,7 +42,8 @@ static virtual_memory_system_t sv39 = { .ppn_width_bits = {12, 9, 9, 26}, .ppn_offset_bits = {0, 12, 21, 30}, .entry_width_bytes = 8, - .vpn_width_bits = 9 + .vpn_width_bits = 9, + .vaddr_bits = 39 }; static virtual_memory_system_t sv48 = { @@ -49,7 +52,8 @@ static virtual_memory_system_t sv48 = { .ppn_width_bits = {12, 9, 9, 9, 26}, .ppn_offset_bits = {0, 12, 21, 30, 39}, .entry_width_bytes = 8, - .vpn_width_bits = 9 + .vpn_width_bits = 9, + .vaddr_bits = 48 }; static virtual_memory_system_t *vms; @@ -152,12 +156,20 @@ int main() void *master_table = get_page(); setup_page_table(master_table, vms->levels-1, 0); uint32_t *physical = get_page(); - uint32_t *virtual = (uint32_t *) (((reg_t) physical) ^ ((reg_t) 0x40000000)); + //uint32_t *virtual = (uint32_t *) (((reg_t) physical) ^ ((reg_t) 0x40000000)); + uint32_t *virtual = (uint32_t *) (((reg_t) physical) ^ (((reg_t) 0xf) << (vms->vaddr_bits - 4))); + // Virtual addresses must be sign-extended. + if (vms->vaddr_bits < sizeof(virtual) * 8 && (reg_t) virtual & ((reg_t) 1<<(vms->vaddr_bits-1))) + virtual = (uint32_t *) ( + (reg_t) virtual | ~(((reg_t) 1 << vms->vaddr_bits) - 1)); add_entry(master_table, 0, (reg_t) virtual, (reg_t) physical); unsigned long satp = set_field(0, SATP_MODE, vms->mode); satp = set_field(satp, SATP_PPN, ((unsigned long) master_table) >> 12); write_csr(satp, satp); + satp = read_csr(satp); + if (get_field(satp, SATP_MODE) != vms->mode) + error(); reg_t mstatus = read_csr(mstatus); mstatus |= MSTATUS_MPRV; |