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| author | Andrew Waterman <andrew@sifive.com> | 2017-08-04 00:23:04 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-08-04 00:24:37 -0700 |
| commit | 7ab7ad44e66ba9bc2d91e04773efa4f87a1d8a3b (patch) | |
| tree | a812037174bae4e6667edd66ef9be5074b7d1855 /benchmarks | |
| parent | ea9e37ff1411a8648710b5539b0971bb5ae9571f (diff) | |
| download | riscv-tests-7ab7ad44e66ba9bc2d91e04773efa4f87a1d8a3b.zip riscv-tests-7ab7ad44e66ba9bc2d91e04773efa4f87a1d8a3b.tar.gz riscv-tests-7ab7ad44e66ba9bc2d91e04773efa4f87a1d8a3b.tar.bz2 | |
Improve RVC test
Make the page-crossing instruction non-idempotent to detect erroneously
executing the first 16 bits of the instruction with garbage MSBs.
Diffstat (limited to 'benchmarks')
| -rw-r--r-- | benchmarks/common/test.ld | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/benchmarks/common/test.ld b/benchmarks/common/test.ld index ada0862..4f8892e 100644 --- a/benchmarks/common/test.ld +++ b/benchmarks/common/test.ld @@ -25,7 +25,8 @@ SECTIONS . = 0x80000000; .text.init : { *(.text.init) } - .tohost ALIGN(0x1000) : { *(.tohost) } + . = ALIGN(0x1000); + .tohost : { *(.tohost) } .text : { *(.text) } |