diff options
| author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2014-08-06 17:26:58 -0700 |
|---|---|---|
| committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2014-08-06 17:26:58 -0700 |
| commit | b6bcab870b1eaf0ed7b75e5458f9880510d26100 (patch) | |
| tree | 250eed5d0528981584dc0719c2eae737c068dd79 /README.md | |
| parent | 0169cffd9364d2c70d556cc8ad3c083c79c8aeb1 (diff) | |
| download | riscv-tests-b6bcab870b1eaf0ed7b75e5458f9880510d26100.zip riscv-tests-b6bcab870b1eaf0ed7b75e5458f9880510d26100.tar.gz riscv-tests-b6bcab870b1eaf0ed7b75e5458f9880510d26100.tar.bz2 | |
updates
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -134,7 +134,7 @@ registers (pc, x0-x31, f0-f31, fsr) can be accessed. The `rv32ui` and `rv64ui` TVMs are integer-only subsets of `rv32u` and `rv64u` respectively. These subsets can not use any floating-point instructions (major opcodes: LOAD-FP, STORE-FP, MADD, MSUB, NMSUB, NMADD, OP-FP), and hence cannot -access the floating-point register state (f0â-f31 and fsr). The integer-only +access the floating-point register state (f0-f31 and fsr). The integer-only TVMs are useful for initial processor bringup and to test simpler implementations that lack a hardware FPU. |