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authorAndrew Waterman <andrew@sifive.com>2016-11-21 15:29:09 -0800
committerAndrew Waterman <andrew@sifive.com>2016-11-21 15:29:09 -0800
commitb68b39031a730ecc155ed87fba2ed5f111d0ab07 (patch)
tree0bee833b8998b094b1b4ed18087538a5d1ae515e
parente135e91b72ea79df1d023262d772cbc4759a4738 (diff)
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Remove cache miss test from all but one AMO test
This doesn't reduce coverage for cache-based RV64 systems, but will improve test runtime and work around the need for smaller test footprint for scratchpad-based RV32 systems. I would argue that these microarchitectural tests should be in the domain of torture, and that the last one should be removed, too.
-rw-r--r--isa/rv64ua/amoadd_d.S17
-rw-r--r--isa/rv64ua/amoadd_w.S17
-rw-r--r--isa/rv64ua/amoand_d.S17
-rw-r--r--isa/rv64ua/amoand_w.S17
-rw-r--r--isa/rv64ua/amomax_d.S1
-rw-r--r--isa/rv64ua/amomax_w.S1
-rw-r--r--isa/rv64ua/amomaxu_d.S1
-rw-r--r--isa/rv64ua/amomaxu_w.S1
-rw-r--r--isa/rv64ua/amomin_d.S1
-rw-r--r--isa/rv64ua/amomin_w.S1
-rw-r--r--isa/rv64ua/amominu_d.S2
-rw-r--r--isa/rv64ua/amominu_w.S2
-rw-r--r--isa/rv64ua/amoor_d.S17
-rw-r--r--isa/rv64ua/amoor_w.S17
-rw-r--r--isa/rv64ua/amoswap_d.S17
-rw-r--r--isa/rv64ua/amoswap_w.S17
-rw-r--r--isa/rv64ua/amoxor_w.S17
17 files changed, 2 insertions, 161 deletions
diff --git a/isa/rv64ua/amoadd_d.S b/isa/rv64ua/amoadd_d.S
index c356bed..05b2f38 100644
--- a/isa/rv64ua/amoadd_d.S
+++ b/isa/rv64ua/amoadd_d.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
li a1, 0xfffffffffffff800; \
la a3, amo_operand; \
sd a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
amoadd.d a4, a1, 0(a3); \
)
@@ -32,15 +25,6 @@ RVTEST_CODE_BEGIN
# try again after a cache miss
TEST_CASE(4, a4, 0xffffffff7ffff800, \
- li a4, 16384; \
- add a5, a3, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
amoadd.d a4, a1, 0(a3); \
)
@@ -61,4 +45,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amoadd_w.S b/isa/rv64ua/amoadd_w.S
index b3d1953..d076d45 100644
--- a/isa/rv64ua/amoadd_w.S
+++ b/isa/rv64ua/amoadd_w.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
li a1, 0xfffffffffffff800; \
la a3, amo_operand; \
sw a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
amoadd.w a4, a1, 0(a3); \
)
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
# try again after a cache miss
TEST_CASE(4, a4, 0x000000007ffff800, \
li a1, 0xffffffff80000000; \
- li a4, 16384; \
- add a5, a3, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
amoadd.w a4, a1, 0(a3); \
)
@@ -62,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amoand_d.S b/isa/rv64ua/amoand_d.S
index 13019ae..c1148c0 100644
--- a/isa/rv64ua/amoand_d.S
+++ b/isa/rv64ua/amoand_d.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
li a1, 0xfffffffffffff800; \
la a3, amo_operand; \
sd a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
amoand.d a4, a1, 0(a3); \
)
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
# try again after a cache miss
TEST_CASE(4, a4, 0xffffffff80000000, \
li a1, 0x0000000080000000; \
- li a4, 16384; \
- add a5, a3, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
amoand.d a4, a1, 0(a3); \
)
@@ -62,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amoand_w.S b/isa/rv64ua/amoand_w.S
index d8f888a..7fe3bd0 100644
--- a/isa/rv64ua/amoand_w.S
+++ b/isa/rv64ua/amoand_w.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
li a1, 0xfffffffffffff800; \
la a3, amo_operand; \
sw a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
amoand.w a4, a1, 0(a3); \
)
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
# try again after a cache miss
TEST_CASE(4, a4, 0xffffffff80000000, \
li a1, 0x0000000080000000; \
- li a4, 16384; \
- add a5, a3, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
amoand.w a4, a1, 0(a3); \
)
@@ -62,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amomax_d.S b/isa/rv64ua/amomax_d.S
index ea7e2d3..b7f8703 100644
--- a/isa/rv64ua/amomax_d.S
+++ b/isa/rv64ua/amomax_d.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amomax_w.S b/isa/rv64ua/amomax_w.S
index b3adbf0..f986205 100644
--- a/isa/rv64ua/amomax_w.S
+++ b/isa/rv64ua/amomax_w.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amomaxu_d.S b/isa/rv64ua/amomaxu_d.S
index b340873..227ac4c 100644
--- a/isa/rv64ua/amomaxu_d.S
+++ b/isa/rv64ua/amomaxu_d.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amomaxu_w.S b/isa/rv64ua/amomaxu_w.S
index 41346d1..eb27d07 100644
--- a/isa/rv64ua/amomaxu_w.S
+++ b/isa/rv64ua/amomaxu_w.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amomin_d.S b/isa/rv64ua/amomin_d.S
index e6febbb..ee6bbf3 100644
--- a/isa/rv64ua/amomin_d.S
+++ b/isa/rv64ua/amomin_d.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amomin_w.S b/isa/rv64ua/amomin_w.S
index 96b547b..1337d2c 100644
--- a/isa/rv64ua/amomin_w.S
+++ b/isa/rv64ua/amomin_w.S
@@ -46,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amominu_d.S b/isa/rv64ua/amominu_d.S
index a1013f3..08bfb5b 100644
--- a/isa/rv64ua/amominu_d.S
+++ b/isa/rv64ua/amominu_d.S
@@ -46,4 +46,4 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
+
diff --git a/isa/rv64ua/amominu_w.S b/isa/rv64ua/amominu_w.S
index 0a9e265..f45f856 100644
--- a/isa/rv64ua/amominu_w.S
+++ b/isa/rv64ua/amominu_w.S
@@ -46,4 +46,4 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
+
diff --git a/isa/rv64ua/amoor_d.S b/isa/rv64ua/amoor_d.S
index 507e877..6f71495 100644
--- a/isa/rv64ua/amoor_d.S
+++ b/isa/rv64ua/amoor_d.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
li a1, 0xfffffffffffff800; \
la a3, amo_operand; \
sd a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
amoor.d a4, a1, 0(a3); \
)
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
# try again after a cache miss
TEST_CASE(4, a4, 0xfffffffffffff800, \
li a1, 1; \
- li a4, 16384; \
- add a5, a3, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
amoor.d a4, a1, 0(a3); \
)
@@ -62,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amoor_w.S b/isa/rv64ua/amoor_w.S
index c0a1c69..e64b8c2 100644
--- a/isa/rv64ua/amoor_w.S
+++ b/isa/rv64ua/amoor_w.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
li a1, 0xfffffffffffff800; \
la a3, amo_operand; \
sw a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
amoor.w a4, a1, 0(a3); \
)
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
# try again after a cache miss
TEST_CASE(4, a4, 0xfffffffffffff800, \
li a1, 1; \
- li a4, 16384; \
- add a5, a3, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
amoor.w a4, a1, 0(a3); \
)
@@ -62,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amoswap_d.S b/isa/rv64ua/amoswap_d.S
index 628f537..6b07d74 100644
--- a/isa/rv64ua/amoswap_d.S
+++ b/isa/rv64ua/amoswap_d.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
li a1, 0xfffffffffffff800; \
la a3, amo_operand; \
sd a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
amoswap.d a4, a1, 0(a3); \
)
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
# try again after a cache miss
TEST_CASE(4, a4, 0xfffffffffffff800, \
li a1, 0x0000000080000000; \
- li a4, 16384; \
- add a5, a3, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
- add a5, a5, a4; \
- ld x0, 0(a5); \
amoswap.d a4, a1, 0(a3); \
)
@@ -62,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amoswap_w.S b/isa/rv64ua/amoswap_w.S
index c09b866..c4276dc 100644
--- a/isa/rv64ua/amoswap_w.S
+++ b/isa/rv64ua/amoswap_w.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
li a1, 0xfffffffffffff800; \
la a3, amo_operand; \
sw a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
amoswap.w a4, a1, 0(a3); \
)
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
# try again after a cache miss
TEST_CASE(4, a4, 0xfffffffffffff800, \
li a1, 0x0000000080000000; \
- li a4, 16384; \
- add a5, a3, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
amoswap.w a4, a1, 0(a3); \
)
@@ -62,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536
diff --git a/isa/rv64ua/amoxor_w.S b/isa/rv64ua/amoxor_w.S
index 1b305dd..1b6fc48 100644
--- a/isa/rv64ua/amoxor_w.S
+++ b/isa/rv64ua/amoxor_w.S
@@ -18,13 +18,6 @@ RVTEST_CODE_BEGIN
li a1, 0xfffffffffffff800; \
la a3, amo_operand; \
sw a0, 0(a3); \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
- nop; nop; nop; nop; \
amoxor.w a4, a1, 0(a3); \
)
@@ -33,15 +26,6 @@ RVTEST_CODE_BEGIN
# try again after a cache miss
TEST_CASE(4, a4, 0x7ffff800, \
li a1, 0xc0000001; \
- li a4, 16384; \
- add a5, a3, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
- add a5, a5, a4; \
- lw x0, 0(a5); \
amoxor.w a4, a1, 0(a3); \
)
@@ -62,4 +46,3 @@ RVTEST_DATA_END
.align 3
amo_operand:
.dword 0
- .skip 65536