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| author | Andrew Waterman <andrew@sifive.com> | 2017-05-01 14:42:42 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-05-01 14:42:42 -0700 |
| commit | af832bf8fd7ed43631e1d1ceb66b10027419a4e6 (patch) | |
| tree | cd832b4223e9c37ae7f57389ee746c2960f22c8d | |
| parent | b3999a33b7bf9c115b095b56976394b19f825ff3 (diff) | |
| download | riscv-tests-af832bf8fd7ed43631e1d1ceb66b10027419a4e6.zip riscv-tests-af832bf8fd7ed43631e1d1ceb66b10027419a4e6.tar.gz riscv-tests-af832bf8fd7ed43631e1d1ceb66b10027419a4e6.tar.bz2 | |
Set ELF entry point correctly
| -rw-r--r-- | benchmarks/common/test.ld | 1 | ||||
| m--------- | env | 10 |
2 files changed, 6 insertions, 5 deletions
diff --git a/benchmarks/common/test.ld b/benchmarks/common/test.ld index a08d71d..ada0862 100644 --- a/benchmarks/common/test.ld +++ b/benchmarks/common/test.ld @@ -12,6 +12,7 @@ specifically one of the entires in bfd/cpu-mips.c */ OUTPUT_ARCH( "riscv" ) +ENTRY(_start) /*----------------------------------------------------------------------*/ /* Sections */ diff --git a/env b/env -Subproject 3f1d04a2e8f849c306bdca7c7115462c3a60a6e +Subproject 70f5e06eef154a1eaeb65d3f034c1857771100f |