index
:
riscv-tools/riscv-tests.git
attempt-travis-fix
ceasetest2
compliance_tests
cs152-sp18-lab3
debug
debug-0.13
debug-clear-satp
debug-delete-sim
debug_auth
debug_disassemble
disable_unavailable
dma-memcpy
eos20-bringup
hw_watchpoint
interrupts
master
misc
no_progbuf
priv
privchange-dontdeleteme
python3
rekall
resume_from_trigger
riscv-tests-sail
rtos
rvt-master
smi-demo
split-isa-tests
sqrt-171
tmp
trap_entry_align
trap_entry_align-1
travis-dev
trigger_priority
usb_error
xlen_fix
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Commit message
Author
Age
ceasetest2
Check basic debugging still works in CeaseMulti
Tim Newsome
20 months
debug
Add debug statement.
Tim Newsome
4 years
debug_disassemble
debug: On failure, disassemble close instructions.
Tim Newsome
21 months
disable_unavailable
debug: Disable Unavailable tests.
Tim Newsome
8 months
master
README: add link to toolchain (#569)
Daniel Maslowski
14 days
misc
Make newer version of pylint happy.
Tim Newsome
5 years
python3
Move to Python 3.
Tim Newsome
5 years
riscv-tests-sail
removed the env/ directory, which was a submodule dir. replaced at a higher l...
William McSpaddden
7 weeks
tmp
tmp
Andrew Waterman
5 years
trigger_priority
Remove ineffective tests.
Tim Newsome
2 years
[...]
Age
Commit message
Author
Files
Lines
2016-12-05
Revert "put arrays in stack to reduce .bss size"
dma-memcpy
Howard Mao
2
-4
/
+6
2016-12-05
put arrays in stack to reduce .bss size
Howard Mao
2
-6
/
+4
2016-11-10
fixes to memcpy() benchmarks
Howard Mao
3
-8
/
+16
2016-11-10
add a dma-based memcpy benchmark
Howard Mao
6
-0
/
+130
2016-11-10
use a separate fast memcpy routine for benchmarking
Howard Mao
1
-2
/
+4
2016-11-10
add a software memcpy benchmark
Howard Mao
5
-0
/
+109
2016-10-21
Improve reg test a little.
Tim Newsome
1
-6
/
+14
2016-10-20
Test OpenOCD step and resume.
Tim Newsome
2
-6
/
+56
2016-10-19
Fix conflict: JTAG VPI changes vs openocd refactor
Tim Newsome
1
-7
/
+4
2016-10-19
Actually test something in regs test.
Tim Newsome
1
-2
/
+4
[...]