Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2020-11-23 | Fix emulation of misaligned access on big endian target (#224) | Marcus Comstedt | 1 | -1/+20 |
2019-07-05 | Report correct scause when faulting while fetching emulated instruction | Andrew Waterman | 1 | -4/+7 |
2018-07-09 | Properly license all nontrivial files | Andrew Waterman | 1 | -0/+2 |
2017-10-23 | Make 4-byte aligned instruction-emulation loads atomic | Andrew Waterman | 1 | -3/+12 |
2017-04-18 | Fix RV32 compilation error | Andrew Waterman | 1 | -1/+2 |
2017-04-11 | Load instructions as unsigned values, not signed | Andrew Waterman | 1 | -4/+4 |
2017-02-19 | Handle IPIs and timer interrupts more quickly | Andrew Waterman | 1 | -0/+2 |
2017-02-15 | Emulate RVFC instructions | Andrew Waterman | 1 | -2/+14 |
2016-12-06 | avoid non-standard predefined macros | Andrew Waterman | 1 | -1/+1 |
2016-07-06 | Udpate to new PTE format | Andrew Waterman | 1 | -2/+2 |
2016-03-09 | Refactor pk, bbl, machine into separate libraries | Andrew Waterman | 1 | -0/+79 |