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2024-03-09target/nrf51: use PAN #16 workaround in reset-init onlyTomas Vanek1-1/+1
After 'reset run' or 'reset halt' the loaded application is expected to manipulate RAMON register to workaround the known silicon errata. Moreover, writing to RAMON register from 'reset-end' event after 'reset run' may collide with application intentions. Use the workaround in 'reset-init' event only to ensure correct function of target algorithms. Change-Id: I7d2d92e6805a05a83676edb46b3163ef39b9a7e4 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8104 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-03-09flash/nor/nrf5, target/nrf51: deprecate nrf51 flash driverTomas Vanek1-4/+2
Use the newer driver name 'nrf5' instead. While on it set the unused parameters of flash bank creation to zero. While on it remove 2 empty comments. Change-Id: I9cf0eadc5b696e6c8b7e6aec0ea3345967523e87 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/8103 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-01-28target/xtensa: add dual-core supportIan Thompson5-372/+455
- Example for configuring multiple non-SMP Xtensa cores e.g. for heterogeneous debug - JTAG only at this time; DAP out of scope - Dual-Xtensa Palladium example via VDebug - Update Xtensa core config examples Signed-off-by: Ian Thompson <ianst@cadence.com> Change-Id: I6d2b3d13fa8075416dcd383cf256a3e8582ee1c1 Reviewed-on: https://review.openocd.org/c/openocd/+/8078 Tested-by: jenkins Reviewed-by: Jacek Wuwer <jacekmw8@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-01-21jtag/vdebug: add support for DAP6Jacek Wuwer9-68/+136
This change implements the support for the ARM Debug Interface v6. The DAP-level interface properly selects the DP Banks and AP address. Sample ARM configuration DAP and JTAG scripts have been updated. Change-Id: I7df87ef764bca587697c778810443649a7f46c2b Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8067 Tested-by: jenkins Reviewed-by: Ian Thompson <ianst@cadence.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-01-06flash/nor/kinetis: add support for NXP S32K seriesDavid Vidrie Leon1-0/+79
S32K General-Purpose Microcontrollers Scalable, low-power Arm® Cortex®-M series-based microcontrollers AEC-Q100 qualified with advanced safety and security and software support for industrial and automotive ASIL B/D applications in body, zone control, and electrification. Change-Id: I4143258535437c18b81802436267bfd561de9d31 Signed-off-by: David Vidrie Leon <davidvidrie@geotab.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8012 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2023-12-30tcl/target: Add Geehy APM32F1x configMarc Schink1-0/+57
Tested with APM32F103CBT6 using JTAG and SWD transport. All flash operations, including sector and device protection, work as expected. Change-Id: Ibefe1a65d710aea87b86ab7ff8a4153512a0ea4f Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8017 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-12-30tcl/target: Add Geehy APM32F4x configMarc Schink1-0/+57
Tested with APM32407RGT6 using JTAG and SWD transport. All flash operations, including sector and device protection, work as expected. Revision identifier (0x0009) is not updated due to missing documentation. Change-Id: I33f4630fd00096656369ecc923aea2dcad77c7d3 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8016 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-12-30tcl/target: Add Geehy APM32F0x configMarc Schink1-0/+49
Tested with APM32F030C8T using SWD transport. All flash operations, including sector and device protection, work as expected. Revision identifier (0x0011) is not updated due to missing documentation. Introduce a new directory structure that contains the manufacturer for the sake of clarity. Change-Id: I679387943b09fef640f8f8b6904e542f4e4b29aa Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8015 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-12-30tcl/target: add Marvell Octeon TX2 CN9130 targetHenrik Nordström1-0/+178
This has a quite complex JTAG router chain requiring both a custom BYPASS instruction to access child taps, and JTAG configuration to enable individual DAP nodes. Change-Id: I6f5345764e1566d70c8526a7e8ec5d250185bd2c Signed-off-by: Henrik Nordström <henrik.nordstrom@addiva.se> Reviewed-on: https://review.openocd.org/c/openocd/+/8042 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-12-24tcl/board: Add TI j722sevm configNishanth Menon1-0/+24
Add basic connection details with j722s EVM For further details, see: https://www.ti.com/lit/zip/sprr495 Change-Id: Ic69d85d69c773c7fad2184561267391fef7a98bc Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8050 Reviewed-by: Bryan Brattlof <hello@bryanbrattlof.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-12-24tcl/target/ti_k3: Add J722S SoCNishanth Menon1-0/+11
Add support for the TI K3 family J722S SoC. This SoC is a variant of AM62P chassis with a different JTAG ID, additional R5 added in (along with C7x and few other peripheral changes). Reuse existing definition. For further details, see https://www.ti.com/lit/zip/sprujb3 Change-Id: I754e6be8df3a26212437ea955f6a791d7c99b0c8 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8049 Reviewed-by: Bryan Brattlof <hello@bryanbrattlof.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-12-10tcl/target/at91sama5d2.cfg: allow choice of SWD instead of JTAGPeter Lawrence1-2/+18
The target supports both SWD and JTAG, but the existing cfg file only supports JTAG. Using the standard [using_jtag] mechanism, the user would now have a choice. Change-Id: Ic6adb68090422812d591f6bf5b945ac10f323c74 Signed-off-by: Peter Lawrence <majbthrd@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8020 Reviewed-by: Jörg Wunsch <openocd@uriah.heep.sax.de> Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-30tcl/target/gd32vf103: work around broken ndmresetThomas Hebb1-0/+77
On this chip, the ndmreset bit in the RISC-V debug module doesn't trigger a system reset like it should. To work around this, add a custom "reset-assert" handler in its config file that resets the system by writing to memory-mapped registers. I've tested this workaround on a Sipeed Longan Nano dev board with a GD32VF103CBT6 chip. It works correctly for both "reset run" and "reset halt" (halting at pc=0 for the latter). I originally submitted[1] this workaround to the riscv-openocd fork of OpenOCD. That fork's maintainers accepted it, but have not upstreamed it like they have several other of my changes. [1] https://github.com/riscv/riscv-openocd/pull/538 Change-Id: I7482990755b300fcbe4963c9a599d599bc02684d Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6957 Tested-by: jenkins Reviewed-by: zapb <dev@zapb.de>
2023-11-11tcl/board: Add TI AM273 launchpad configNishanth Menon1-0/+25
Add basic connection details with AM273 Launchpad For further details, see: https://www.ti.com/tool/LP-AM273 Change-Id: I88a02cdbccb65c185e808503d080cc1f12c909ae Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7951 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11tcl/target/ti_k3: Add AM273 SoCNishanth Menon1-0/+21
Add support for the TI K3 family AM273 SoC. For further details, see https://www.ti.com/lit/pdf/spruiu0 Change-Id: Ifa21d0760831f4f525ecd976fb8d086ffdbc9e9f Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7950 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-11-11tcl/board: Add TI AM263 launchpad configNishanth Menon1-0/+25
Add basic connection details with AM263 Launchpad For further details, see: https://www.ti.com/tool/LP-AM263 Change-Id: I94c7a9ca70734ae89c6df3f02137d5bd32fde774 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7949 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-11-11tcl/target/ti_k3: Add AM263 SoCNishanth Menon1-0/+18
Add support for the TI K3 family AM263 SoC. For further details, see https://www.ti.com/lit/pdf/spruim2 Change-Id: I9a91b3d675511661dfc2710a7183bd59b98da133 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7948 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11tcl/board: Add TI AM243 launchpad configNishanth Menon1-0/+25
Add basic connection details with AM243 Launchpad For further details, see: https://www.ti.com/tool/LP-AM243 Change-Id: Id8cec6675a222888b0007484209558d6503dbcda Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7947 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11tcl/target/ti_k3: Add AM243 SoCNishanth Menon1-0/+9
Add support for the TI K3 family AM243 SoC. This SoC is built on the same base of AM642, so reuse the configuration with the exception of Cortex-A53 which is not available on this device. For further details, see https://www.ti.com/lit/pdf/spruim2 Change-Id: I971ba878b0f503e5120f6853634776eb61d05080 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7946 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11tcl/target/ti_k3: Sort the SoC documentation alphabeticallyNishanth Menon1-10/+10
Sort the documentation for the TI K3 parts alphabetically. Change-Id: I2c40714ad590e3d9232a6f915c157d677e0c3610 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7945 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-11-11tcl/target/ti_k3: Make Cortex-A processors optionalNishanth Menon1-16/+18
The AM2x family of K3 SoCs typically do not contain a Cortex-A53 or A72 processor. So, make the cpu "up" functions available when armv8 processor count > 0. Change-Id: I985b194fe7cc63e4134ad84ccd921cc456eb412f Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7944 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11tcl/target/ti_k3: Convert memory access ap port num as a variableNishanth Menon1-1/+4
Convert the memory access ap port num as a variable to allow support for the AM2x family of K3 SoCs. Change-Id: Ibd96c94055721f60d95179dab21d014c15b0f562 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7943 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-11-11tcl/target/ti_k3: Convert Cortex-R5 ap port num as a variableNishanth Menon1-2/+3
Convert the Cortex-R5 ap port num as a variable to allow support for the AM2x family of K3 SoCs. Change-Id: I7dc8b459dca8b5f21395230b5cb782b14538bd48 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7942 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-11-11tcl/target/ti_k3: Convert sysctrl ap port num as a variableNishanth Menon1-2/+5
Convert the sysctrl ap port num as a variable to allow support for the AM2x family of K3 SoCs. Change-Id: I1b5b55e48240e6654779dd636fdf07bca055e192 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7941 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11tcl/board: add board configuration for Advantech IMX8QM DMSSE20Oliver Graute1-0/+23
Change-Id: Iebf2a901b428cf3b99110aea0f3ab0e1f17b0250 Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7974 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: zapb <dev@zapb.de>
2023-10-07target/nrf52: Create and configure TPIUFrank Plowman1-0/+49
Firstly, create the TPIU nrf52.tpiu if using the nrf52 target. This is standard, using AP 0 and TPIU base address 0xE0040000. Secondly, add a pre_enable handler for this TPIU which configures the TRACEMUX field of the TRACECONFIG register. This register is reset every time the MCU resets, so the pre_enable handler creates a reset-end handler to ensure the register remains set. Change-Id: I408b20fc03dc2060c21bad0c21ed713eee55a113 Signed-off-by: Frank Plowman <post@frankplowman.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7901 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-10-07tcl/target/ti_k3: Add AXI-AP port for direct SoC memory map accessNishanth Menon1-0/+3
While we can read and write from memory from the view of various processors, all K3 debug systems have a AXI Access port that allows us to directly access memory from debug interface. This port is especially useful in the following scenarios: 1. Debug cache related behavior on processors as this provides a direct bypass path. 2. Processor has crashed or inaccessible for some reason (low power state etc.) 3. Scenarios prior to the processor getting active. 4. Debug MMU or address translation issues (example: TI's Region Address Table {RAT} translation table used to physically map SoC address space into R5/M4F processor address space) The AXI-AP port is the same for all processors in TI's K3 family. To prevent a circular-loop scenario for axi-ap accessing debug memory with dmem (direct memory access debug), enable this only when dmem is disabled. Change-Id: Ie4ca9222f034ffc2fa669fb5124a5f8e37b65e3b Reported-by: Dubravko Srsan <dubravko.srsan@dolotron.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7899 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-10-07tcl/target/ti_k3: Introduce RTOS array variable to set various CPU RTOSesNishanth Menon1-4/+17
The Texas Instruments' K3 devices are a mix of AMP and SMP systems. The operating systems used on these processors can vary dramatically as well. Introduce a RTOS array variable, which is keyed off the cpu to identify which RTOS is used on that CPU. This can be "auto" or "hwthread" in case of SMP debug etc. For example: AM625 with an general purpose M4F running Zephyr and 4 A53s running SMP Linux could be invoked by: openocd -c 'set V8_SMP_DEBUG 1' -c 'set RTOS(am625.cpu.gp_mcu) Zephyr' \ -c "set RTOS(am625.cpu.a53.0) hwthread" -f board/ti_am625evm.cfg Change-Id: Ib5e59fa2583b3115e5799658afcdd0ee91935e82 Reported-by: Dubravko Srsan <dubravko.srsan@dolotron.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7898 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-07tcl/target/ti_k3: Add coreid identification to SMP processorsDubravko Srsan1-1/+1
Describe the SMP Armv8 cores in SMP configuration with coreid explicitly called out. This allows for gdb session to call the smp behavior clearly. Change-Id: Ie43be22db64737bbb66181f09d3c83567044f3ac Signed-off-by: Dubravko Srsan <dubravko.srsan@dolotron.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7897 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-10-07tcl/target/ti_k3: Fix smp target descriptionDubravko Srsan1-1/+1
When _v8_smp_targets is used with V8_SMP_DEBUG=1, describe the targets as SMP targets. However, the variable expansion is not in the context of a proc, and a typo in referring to global $_v8_smp_targets causes this to fail. Just refer to $_v8_smp_targets directly. Change-Id: Iffe5fd2703bed6a9c840284285e70b8a8ce84e17 Signed-off-by: Dubravko Srsan <dubravko.srsan@dolotron.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7896 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23tcl/target: add support for Cavium Octeon II CN61xxPeter Mamonov1-0/+15
Change-Id: Ia14854bc64f5a31b6591be69be4edee9cd1310c3 Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/5249 Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23tcl/target: Add XLP3xx configuration filesPeter Mamonov4-0/+60
The patch adds configuration files for the following XLP 300-series processors: XLP304, XLP308, XLP316. Change-Id: Iaf2b807abf9fc4d7b51222fd40bdb18c6aca7d9c Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> CC: Antony Pavlov <antonynpavlov@gmail.com> CC: Dongxue Zhang <elta.era@gmail.com> CC: Oleksij Rempel <linux@rempel-privat.de> CC: Paul Fertser <fercerpav@gmail.com> CC: Salvador Arroyo <sarroyofdez@yahoo.es> CC: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: https://review.openocd.org/c/openocd/+/2323 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23jtagspi/pld: add support from gatemate driverDaniel Anselmi1-0/+6
Provide jtagspi with specific procedures to be able to use jtagspi for programming spi-flash devices on cologne chip gatemate devices. Change-Id: Ifa1c4ca6e215d7f49bd21620898991af213812e9 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7838 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23jtagspi/pld: add support from intel driverDaniel Anselmi1-1/+5
Provide jtagspi with information to use jtagspi for programming spi-flash devices on intel devices using a proxy bitstream. Change-Id: Ib947b8c0dd61e2c6fa8beeb30074606131b1480f Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7837 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23jtagspi/pld: add support from xilinx driverDaniel Anselmi1-0/+25
Provide jtagspi with information to use jtagspi for programming spi-flash devices on xilinx devices using a proxy bitstream. Change-Id: I68000d71de25118ed8a8603e544cff1dc69bd9ba Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7836 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23jtagspi/pld: add support from efinix driverDaniel Anselmi1-1/+6
Provide jtagspi with information to use jtagspi for programming spi-flash devices on efinix trion and titanium devices using a proxy bitstream. Change-Id: I4a851fcaafe832c35bd7b825d95a3d08e4d57a7b Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7826 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23jtagspi/pld: add support from lattice certus driverDaniel Anselmi1-0/+8
Provide jtagspi with specific procedures to be able to use jtagspi for programming spi-flash devices on lattice certus and certus po devices. Change-Id: I6a8ec16be78f86073a4ef5302f6241185b08e1c6 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7825 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23jtagspi/pld: add support from lattice ecp5 driverDaniel Anselmi1-1/+7
Provide jtagspi with specific procedures to be able to use jtagspi for programming spi-flash devices on lattice ecp5 devices. Change-Id: I4a4a60f21d7e8685a5b8320b9c6ebdc2693bbd21 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7824 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23jtagspi/pld: add interface to get support from pld driversDaniel Anselmi1-2/+10
Jtagspi is using a proxy bitstream to "connect" JTAG to the SPI pins. This is not possible with all FPGA vendors/families. In this cases a dedicated procedure is needed to establish such a connection. This patch adds a jtagspi-mode for these cases. It also adds the needed interfaces to jtagspi and the pld-driver so the driver can select the mode and provide the necessary procedures. For the cases where a proxy bitstream is needed, the pld driver will select the mode and provide instruction code needed in this case. Change-Id: I9563f26739589157b39a3664a73d91152cd13f77 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7822 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23tcl/board: Add TI am62pevm configNishanth Menon1-0/+24
Add basic connection details with AM62P SK/EVM For further details, see: https://www.ti.com/lit/zip/sprr487 Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I1ba5e0c7627cf09cc8c221701bc44f73523a4574 Reviewed-on: https://review.openocd.org/c/openocd/+/7893 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Bryan Brattlof <hello@bryanbrattlof.com>
2023-09-23tcl/target/ti_k3: Add AM62P SoCNishanth Menon1-2/+11
Add support for the TI K3 family AM62P SoC. This SoC is built on the same base of AM62A7, so reuse the configuration with the exception of the JTAG ID and the actual name used for the R5 core (moved from main domain to wakeup domain). For further details, see https://www.ti.com/lit/pdf/spruj83 Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I3a80be9e71204ed7697e51ac1ad488ef405744ef Reviewed-on: https://review.openocd.org/c/openocd/+/7892 Reviewed-by: Bryan Brattlof <hello@bryanbrattlof.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23tcl/board: Add TI j784s4evm configNishanth Menon1-0/+25
Add basic connection details with J784S4 SK/EVM For further details, see: Texas Instruments J784S4 EVM: https://www.ti.com/tool/J784S4XEVM Texas Instruments SK-AM69: https://www.ti.com/tool/SK-AM69 Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I09c8a193d53e13b27adb5a6d01f6d937d6be49a1 Reviewed-on: https://review.openocd.org/c/openocd/+/7891 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23tcl/target/ti_k3: Add J784s4 SoCNishanth Menon1-0/+33
Add support for the TI K3 family J784S4/AM69 SoC. For further details, see http://www.ti.com/lit/zip/spruj52 Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I3c899aed0cb79ab8bbf8077ca6dfe0636cf72288 Reviewed-on: https://review.openocd.org/c/openocd/+/7890 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23tcl/target/ti_k3: Set _CHIPNAME in one placeNishanth Menon1-7/+2
$_soc is set per platform, no point in duplicating _CHIPNAME to explicitly set the information provided by $_CHIPNAME itself. So move it out after the check for CHIP_NAME Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I60d30d6a9a2ce352f66c5bc03075e4ba638e3062 Reviewed-on: https://review.openocd.org/c/openocd/+/7889 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-19flash/stm32l4x: support STM32WBA5xx devicesTarek BOCHKATI1-0/+106
STM32WBA5x have a single bank flash up to 1MB Change-Id: I3d720e202f0fdd89ecd8aa7224653ca5a7ae187b Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com> Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7694 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-17tcl/interface/ftdi: Add documentation for HS2Joshua Nekl1-0/+4
Change-Id: I75d6aa0292bf7ff4ebee8752a5e7a3516500cd04 Signed-off-by: Joshua Nekl <Joshua.Nekl@skyworksinc.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7881 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-17tcl/interface/ftdi: digilent-hs2.cfg SWD configJoshua Nekl1-0/+2
Add SWD_EN and SWDIO_OE config for Digilent HS2 Change-Id: I3f7479bbe2e518ad6f84bf9eb729b54fee4a0f9b Signed-off-by: Joshua Nekl <Joshua.Nekl@skyworksinc.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7863 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-08flash/nor: add support for Nuvoton NPCX4/K3 series flashLuca Hung1-2/+8
Added NPCX flash driver to support the Nuvoton NPCX4/K3 series microcontrollers. Add config file for these series. Change-Id: I0b6e128fa51146b561f422e23a98260594b1f138 Signed-off-by: Luca Hung <YCHUNG0@nuvoton.com> Signed-off-by: Mulin CHao <mlchao@nuvoton.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7794 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-02tcl/arc: Fix ARC v2 registers r22/r23Robert Kovacsics1-2/+2
There was a typo in the register numbering. Signed-off-by: Robert Kovacsics <kovirobi@gmail.com> Change-Id: Ie5d306725962c42f1bce976b80968145e6d0a177 Reviewed-on: https://review.openocd.org/c/openocd/+/7860 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2023-08-26tcl/board: Add j721e native swd configurationKaelin Laundry2-0/+31
Direct memory driver swd native configuration for j721E Signed-off-by: Kaelin Laundry <wasabifan@outlook.com> Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: I27455040f48c47271ae110afd114fce005824969 Reviewed-on: https://review.openocd.org/c/openocd/+/7259 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
generated by cgit v1.1 at 2024-10-12 23:33:03 +0000