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2024-09-21src/rtos/rtos_nuttx_stackings.c: Fix stack alignment for cortex-m targetsdaniellizewski3-93/+104
Backtraces performed by GDB on any thread other than the current thread would fail if hardware 8 byte ISR stack alignment was enabled on cortex_m targets. Stack reads now adjust the stored SP to account for a potential offset introduced by hardware. Fixed incorrect register offsets for cortex_m Nuttx frames by reading the TCB info symbols to determine correct offsets. Fixed offsets can no longer be used since the offsets have changed multiple times for different Nuttx versions. Tested on nuttx-12.1.0. Tested using custom stm32h7 board and custom s32k148 board variants. Built with CONFIG_ARCH_FPU enabled and disabled to test FPU and non FPU frame logic. Change-Id: Ifcbeefb0ddcfbcb528daa9d1d95732ca9584c9ef Signed-off-by: daniellizewski <daniellizewski@geotab.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8180 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-09-21aarch64: Invalidate caches on resetPeter Collingbourne2-12/+39
When a target is reset we must invalidate register caches in order to avoid showing stale register values or writing them back to registers. Use EDPRSR.SR to detect a previous reset, and EDPRSR.R to detect a current reset state. Change-Id: Ia1e97d7154cf7789d392274eee475733086a835b Signed-off-by: Peter Collingbourne <pcc@google.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8425 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-09-19Merge pull request #1132 from en-sc/en-sc/from_upstreamEvgeniy Naydanov26-249/+270
Merge up to fd7b66c5eb038185b72953821204ec9bb8ce49d1 from upstream
2024-09-16target/breakpoints: fix types in `watchpoint_add_internal()`Evgeniy Naydanov1-1/+1
There was a conflict: 1. commit 2cd8ebf44d1a ("breakpoints: use 64-bit type for watchpoint mask and value") 2. commit 0bf3373e808a ("target/breakpoints: Use 'unsigned int' for length") The second commit was created erlier, but merged later so the types of `mask` and `value` became `uint32_t` in `watchpoint_add_internal()`. This created a bug: `WATCHPOINT_IGNORE_DATA_VALUE_MASK` is defined as `(~(uint64_t)0)`. Truncation to uint32_t makes it so the comparisons with the constant don't work. Change-Id: I19c414c351f52aff72a60330d83c29db7bbca375 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2024-09-16Merge up to fd7b66c5eb038185b72953821204ec9bb8ce49d1 from upstreamEvgeniy Naydanov26-249/+270
Backports the fix for #1131. Commit 0bf3373 ("target/breakpoints: Use 'unsigned int' for length") introduces a bug. Link: https://review.openocd.org/c/openocd/+/7056/comment/3c4d9185_83614e2a/ Change-Id: I9f5f67050698a83c27f84965f6de031e2cad492d
2024-09-15binarybuffer: Fix inverted return value in buf_cmpJessica Clarke1-1/+1
This is the fast path for when there is a mismatch in the leading whole bytes, which means we should return true to indicate not equal like all the other cases here and in the surrounding functions. Otherwise we'll incorrectly report _buf1 == _buf2 if and only if there are mismatches in the leading whole bytes. This was introduced during the refactor and optimisation referenced below. The only in-tree caller of this is jtag_check_value_inner, which will just fail to catch some errors. However, downstream in riscv-openocd it gets used in the riscv target to determine whether an IR scan is needed to select the debug module, and with an IRLEN >= 8 this breaks resetting if the encoding for the DMI isn't all-ones in its leading whole bytes (to match BYPASS), since it will believe they are the same and not do an IR scan, failing (with "At least one TAP shouldn't be in BYPASS mode") in the subsequent DR scan due to the TAP still being recorded as having bypass set (and really having an instruction of either BYPASS or IDCODE). Fixes: e4ee891759b0 ("improve buf_cmp and buf_cmp_mask helpers") Change-Id: Ic4f7ed094429abc4c06a775eb847a8b3ddf2e2d6 Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8489 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2024-09-15flash/nor/sfdp, stmqspi: use native type for buffer sizeTomas Vanek3-4/+4
Two different sizes uint8_t and uint32_t was used for this value without a good reason. Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: I4bb60cc5397ffd0d37e7034e3930e62793140c8d Reviewed-on: https://review.openocd.org/c/openocd/+/8439 Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Tested-by: jenkins
2024-09-15flash/nor/sfdp: expose SFDP_MAGIC in sfdp.hTomas Vanek2-1/+2
Could be handy for dummy transfer size detection. Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: Ibb485218f6c2ff9066910bb58be0fc614b77add3 Reviewed-on: https://review.openocd.org/c/openocd/+/8438 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2024-09-15target/espressif: add profiling function for ESP32-S3Richard Allen4-0/+78
Use the TRAX interface DEBUGPC if available. Otherwise use default stop-and-go profiling. ESP32-S3, before this patch: Internal: 8 samples/second FT2232H: 12 samples/second After this patch: Internal: 18ksamples/second FT2232H: 100ksamples/second Change-Id: I681f0bccf4263c1e24f38be511e3b3aec8bf4d60 Signed-off-by: Richard Allen <rsaxvc@rsaxvc.net> Reviewed-on: https://review.openocd.org/c/openocd/+/8431 Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Ian Thompson <ianst@cadence.com> Reviewed-by: Yurii Shutkin <yurii.shutkin@gmail.com>
2024-09-15rtos: use target_buffer_get_u32()Antonio Borneo1-3/+1
Simplify the code using the target endianness independent API. Change-Id: I39f720d0db9cf24eb41d7f359e4321bbc2045658 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8474 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-09-15binarybuffer: add asserts for the number of requested bits for get/set functionsParshintsev Anatoly1-0/+4
Change-Id: Ieca5b4e690c9713ad60dc9d8c223c2d64822e2f5 Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8427 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-09-15src/flash/nor/kinetis.c: Fixed flash bank write gapdaniellizewski1-0/+1
Flash banks created in kinetis_create_missing_banks did not populate bank->minimal_write_gap. The default value of 0 was interpreted as FLASH_WRITE_CONTINUOUS. This created unnecessary large padding if your binary had a gap in the populated flash. It also caused flash errors when loading with GDB because the erroneously padded pages were not erased first. Tested using an S32k148 using s32k.cfg. Change-Id: I9b7af698e29ac2c4f5fc8ecd82fa7f4b1a0d43f1 Signed-off-by: daniellizewski <daniellizewski@geotab.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8463 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-09-15drivers/jlink: Print serial numbers when multiple devices are connectedMarcus Nilsson1-0/+14
When multiple jlink programmers are connected and no specific serial or USB location is specified, print out the detected serial numbers. Signed-off-by: Marcus Nilsson <brainbomb@gmail.com> Change-Id: I280da2b85363f7054c5f466637120427cadcf7d1 Reviewed-on: https://review.openocd.org/c/openocd/+/8356 Reviewed-by: Mark Zhuang <mark.zhuang@spacemit.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-09-15rtos/hwthread: fix threadid generationParshintsev Anatoly1-1/+1
Looks like 7f2d3e2925 introduced a regression by incorrectly assigning threads. The title of the commit message says that the intention was to "derive threadid from SMP index", this is not what happens, however. Instead threadid is assigned based on an index of all examined targets in an SMP group. This introduces two logical errors. *Error 1* Here is the code that assigns threads to harts: ``` foreach_smp_target(head, target->smp_targets) { struct target *curr = head->target; if (!target_was_examined(curr)) continue; threadid_t tid = threads_found + 1; hwthread_fill_thread(rtos, curr, threads_found, tid); ``` Now, imagine a situation when we have two targets: `target.A` and `target.B`. Let's assume that `target.A` is NOT examined (it could be under reset, for example). Then, according to the algorithm when assigning thread identifiers `target.B` will be assigned tid of 1. The respected inferior on GDB side will be called `Thread 1`. Now, imagine that `target.A` activates and succefully examined - OpenOCD will re-assign thread identifiers. And now on GDB side `Thread 1` will represent the state of `target.A`. Which is incorrect. *Error 2* The reverse mapping between `threadid` and targets does not take the state of targets into account. ``` static struct target * hwthread_find_thread(struct target *target, threadid_t thread_id) ... threadid_t tid = 1; foreach_smp_target(head, target->smp_targets) { if (thread_id == tid) head->target; ++tid; } ``` So the constructed mapping is incorrect. Since in example above `Thread 1` will get mapped to `target.A`. *Solution:* It seems that threadids should be assigned based on position of the thread in an smp group disregarding the target state. Change-Id: Ib93b7ed3bb03696afdf56a105b333e22b9ec69b5 Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8471 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Mark Zhuang <mark.zhuang@spacemit.com> Tested-by: jenkins Reviewed-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2024-09-10target/riscv: do not emit warnings when a non-existent CSR is hiddenParshintsev Anatoly1-1/+1
hide_csrs should not emit warnings on an attempt to hide non-exitents CSR. hide_csrs funcitonality is intended to be used for scenarios when we don`t want certain groups of registers to be available in GDB. Typically this is needed to simplify integration with various IDE. In such scenarious it may be impractical/unfeseable to figure out which register is present on a target. So reporting a situation when a user wants to hide a non-existent register creates way too much noise. This commit reduces severity of relevant debug message to LOG_TARGET_DEBUG Change-Id: Icbb982c4bcce7586fe35b6b004d0874d6014d5a7
2024-09-10Revert "target/riscv: re-apply patch do stop avoid warnings when a ↵Evgeniy Naydanov1-1/+1
non-existent CSR is hidden" This reverts commit e56dc61697e91cf7273476ec3126078692a5e387. The reverted commit claims to be the same as b201a5db23c0db34c0e10fd1c7c08fc73a5ec3fc, but it's not -- it changes the warning in `riscv_reg_impl_expose_csrs()` instead of the one in `riscv_reg_impl_hide_csrs()`.
2024-09-10Merge pull request #1129 from rtwfroody/callocEvgeniy Naydanov1-2/+2
target/riscv: Fix calloc calls.
2024-09-07jtag_vpi: fix signed/unsigned comparison jtag_vpi_stableclocksParshintsev Anatoly1-1/+1
Change-Id: Id2b00fbc8ba627f4465c109fbde6e010faaff9d2 Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8462 Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-09-07flash/stm32l4x: option_write usage: mask is optionalOndřej Hošek1-1/+1
If no mask is given, the value in the option register is replaced completely. If a mask is set, only those bits that are set in the mask are transferred into the option register; the others remain unchanged. Change-Id: If488a10f92d7dcc0e0f192aef5e67c255fd529c3 Signed-off-by: Ondřej Hošek <ondra.hosek@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8466 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-09-07drivers/cmsis_dap: Fix buffer overflow in cmsis_dap_hid_open()Marcus Nilsson1-2/+6
Use mbstowcs() to get required length of wide character string and include space for terminating null wide character. Change-Id: I668de6f0acc9b3ec5aca033d870dd9ef354f9077 Signed-off-by: Marcus Nilsson <brainbomb@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8232 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-09-07binarybuffer: str_to_buf(): align prefix to TCL syntaxAntonio Borneo1-46/+33
Integer values are interpreted by TCL as decimal, binary, octal or hexadecimal if prepended with '0d', '0b', '0o' or '0x' respectively. The case of '0' prefix has been interpreted as octal till TCL 8.6 but is interpreted as part of a decimal number by JimTCL and from TCL 9. Align str_to_buf() to latest TCL syntax by: - addding support for '0d', '0b' and '0o' prefix; - dropping support for '0' prefix. Change-Id: I708ef72146d75b7bf429df329a0269cf48700a44 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8465 Tested-by: jenkins Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2024-09-06target/riscv: Fix calloc calls.Tim Newsome1-2/+2
This was pointed out by gcc. Presumably it's a newer warning. I doubt it has any effect on anything.
2024-09-06target/riscv: avoid unnecessary IR scansEvgeniy Naydanov1-0/+3
Change-Id: I03feb5c7d72d5aa38f2cc13c4ed30175cffde84a Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2024-09-06Merge pull request #1112 from en-sc/en-sc/misa-xlenEvgeniy Naydanov1-8/+90
target/riscv: check `misa` value before reporting
2024-09-06Merge pull request #1111 from en-sc/en-sc/ref-reg-manual-hwbpEvgeniy Naydanov3-87/+116
target/riscv: manage triggers available to OpenOCD for internal use
2024-09-06Merge pull request #1125 from fk-sc/fk-sc/field-duplicationEvgeniy Naydanov5-20/+42
target/riscv: remove duplicate of progbufsize field
2024-09-05target/riscv: manage triggers available to OpenOCD for internal useEvgeniy Naydanov3-87/+116
Before the change, if the user wrote to any `tdata*` register, OpenOCD would sometimes start to disable all the triggers (by writing zeroes to `tdata1`) and re-enable them again (by witing all trigger registers to the values read before for each `tselect` value), e.g. on `step` (see `disable/enable_triggers()`). There are a couple of issues with such approach: 1. RISC-V Debug Specification does not require custom register types to support re-enabling by such sequence of writes (e.g. some custom trigger type may require writing a custom CSR to enable it). 2. OpenOCD may still overwrite these triggers when a user asks to set a new WP. This commit introduces `riscv reserve_trigger ...` command to explicitly mark the triggers OpenOCD should not touch. Such approach allows to separate management of custom triggers and offload it onto the user (e.g. disable/enable such triggers by setting up an event handler on `step`-related events). Change-Id: I3339000445185ab221368442a070f412bf44bfab Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2024-09-05target/riscv: check `misa` value before reportingEvgeniy Naydanov1-8/+90
Currently, during register file examination: 1. A read of an XPR is attempted via 64-bit abstract access. 2. If such a read fails (e.g. connection unstable) XLEN is assumed to be 32. 3. Then `misa` is read. Since `misa` is a CSR and it may be only readable via program buffer, `s0` should be readable beforehand (at least some assumption about `xlen` should be made). 4. Before the commit, the `misa.mxl` field was not checked against `xlen`, therefore erroneous info may have been reported to the user. Moreover, the `examine()` would pass indicating no error at all. 5. After the commit, `misa.mxl` is checked against `xlen` value. Change-Id: I3fe5bd6742e564e6de782aad9ed10e65c0728923 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2024-09-04Merge pull request #1115 from en-sc/en-sc/fixup-bscanEvgeniy Naydanov2-29/+28
target/riscv: restrict BSCAN-related commands to before-`init`
2024-09-04target/riscv: remove duplicate progbufsize fieldFarid Khaydari5-20/+42
* removed `progbuf_size` field from `riscv_info`; added getter * moved `impebreak` field from `riscv_info` to `riscv013_info` as implementation dependent field; added getter Signed-off-by: Farid Khaydari <f.khaydari@syntacore.com>
2024-09-03Merge pull request #1109 from aap-sc/aap-sc/sbus_fixupAnatoly Parshintsev1-4/+7
target/riscv: sys bus v1 fix for sizes greater than 4
2024-08-30Merge pull request #1118 from aap-sc/aap-sc/fixup_hidecsr_warningsAnatoly Parshintsev1-1/+1
target/riscv: re-apply patch do stop avoid warnings when a non-existent CSR is hidden
2024-08-25target/cortex_m: add DSCSR_CDSKEY bit definitionTomas Vanek1-0/+1
Needed e.g. for flash drivers handling secure mode. Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: If6cb49609140d06a73bcf2e446b6a634d6326e80 Reviewed-on: https://review.openocd.org/c/openocd/+/8435 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-08-25rtt: default the ID to "SEGGER RTT"Karl Palsson1-3/+9
Instead of making people type this in all the time, just default to "SEGGER RTT" so more things work out of the box. Change-Id: I147142cf0a755e635d3f66e047be2eb5049cf511 Signed-off-by: Karl Palsson <karl.palsson@marel.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8354 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-08-25target: fix profiler output on WindowsRichard Allen1-1/+1
Open output file in binary mode to disable EOL conversion on Windows (and sometimes cygwin depending on installation settings and path). Change-Id: I38276dd1af011ce5781b0264b7cbb08c32a1a2ad Signed-off-by: Richard Allen <rsaxvc@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8278 Reviewed-by: Karl Palsson <karlp@tweak.au> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-08-25target/breakpoints: Use 'unsigned int' for lengthMarc Schink3-17/+18
Change-Id: I233efb5b18de5f043fdc976807437db0a94236d1 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/7056 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-08-25arm_cti: Add CTIDEVCTL to register listPeter Collingbourne2-0/+2
This is useful for setting a reset catch on a CPU that is being brought out of reset. Change-Id: Id8fe9bc3f75fd170f207f470a9f3b0faba7f24c1 Signed-off-by: Peter Collingbourne <pcc@google.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8422 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-08-25arm_cti: Clean up the list of CTI registersPeter Collingbourne1-33/+31
Reduce the amount of boilerplate by moving cti_regs into its only user, making it a local variable and removing the now-redundant p_val pointer. Change-Id: I778cc1e960532fae1ac1a952c6ff19c54e578a5f Signed-off-by: Peter Collingbourne <pcc@google.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8421 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2024-08-25arm_adi_v5: Also clear sticky overrun bit on initPeter Collingbourne1-4/+5
Some targets start up with the sticky overrun bit set. On such targets we need to clear it in order to avoid subsequent incorrect reads. Change-Id: I3e939a9e092de6fcea9494d3179a3386aa1701d2 Signed-off-by: Peter Collingbourne <pcc@google.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8420 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2024-08-25target: arm_adi_v5: add more CoreSight P/NAntonio Borneo1-0/+10
Add part numbers for: - Cortex-A65AE, - Cortex-M52, - Cortex-M55, - Cortex-R52+, - STAR-MC1. Change-Id: I6282768896dd727e803a071139816494470744f1 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8319 Tested-by: jenkins
2024-08-25target/arm_cti: Use suitable data typesMarc Schink1-7/+4
While at it, fix some small coding style issues. Change-Id: Ifb8e78b55d29a06d69a3ce71d12d0040777aef13 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/8423 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-08-25binarybuffer: str_to_buf(): simplify it and fix scan-build errorAntonio Borneo1-73/+26
The function str_to_buf() can be simplified by writing directly the intermediate results in the output buffer. Such simplification improves the readability and also makes scan-build happy, as it does not trigger anymore the warning: src/helper/binarybuffer.c:328:8: warning: Use of memory allocated with size zero [unix.Malloc] if ((b256_buf[(buf_len / 8)] & mask) != 0x0) { Change-Id: I1cef9a1ec5ff0e5841ba582610f273e89e7a81da Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8396 Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Tested-by: jenkins
2024-08-25binarybuffer: str_to_buf(): rename buf_len as buf_bitsizeAntonio Borneo2-9/+9
The name 'buf_len' is misleading, as it usually refers to the byte length of a buffer. Here we use it for the length in bits. Rename it as 'buf_bitsize'. While there, fix checkpatch error by changing the index type to 'unsigned int'. Change-Id: I78855ed79a346d996d9c0100d94d14c64a36b228 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8395 Tested-by: jenkins Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2024-08-25binarybuffer: simplify the prototype of str_to_buf()Antonio Borneo3-33/+20
With 'radix' always zero and '_detected_radix' always NULL, drop the two parameters and simplify str_to_buf(). While there: - drop some redundant assert(), - drop the re-check for the base prefix, - simplify str_strip_number_prefix_if_present() and rename it, as the prefix MUST be present, - fix a minor typo, - update the doxygen description of str_to_buf(). Change-Id: I1abdc8ec0587b23881953d3094101c04d5bb1c58 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8394 Tested-by: jenkins Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2024-08-25helper: command: drop radix parameter from command_parse_str_to_buf()Antonio Borneo4-31/+9
Commit 53b94fad58ab ("binarybuffer: Fix str_to_buf() parsing function") introduces the helper command_parse_str_to_buf() to parse as number a string on TCL command-line. The parameter 'radix' can specify the base (decimal, octal, hexadecimal, or auto-detected). TCL is supposed to use decimal numbers by default, while octal and hexadecimal numbers must be prefixed respectively with '0' and '0x' (or '0X'). This would require the helper to always run auto-detection of the base, thus always set the 'radix' parameter to zero. This makes the parameter useless. Keeping the 'radix' parameter can open the door to future abuse of TCL syntax, E.g. a command can require an octal value without the mandatory TCL '0' prefix; the octal value cannot be the result of TCL expression. To prevent any future abuse of the 'radix' parameter, drop it. Change-Id: I88855bd83b4e08e8fdcf86a2fa5ef3269dd4ad57 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8393 Tested-by: jenkins Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2024-08-21target/riscv: re-apply patch do stop avoid warnings when a non-existent CSR ↵Parshintsev Anatoly1-1/+1
is hidden the original fix was introduced in b201a5db23 but was lost in 3883b03a
2024-08-20fixed compilation failure due to signed/unsigned comparison warningParshintsev Anatoly1-1/+1
the warning is caused by b3d4c97b in upstream OpenOCD
2024-08-20Merge up to ac63cd00d792331914db0b6edd3f427c30eec3fa from upstreamParshintsev Anatoly67-644/+1056
- src/jtag/drivers/ftdi.c: ``` ++<<<<<<< HEAD + int i; + static const uint8_t zero; ++======= + uint8_t zero = 0; ++>>>>>>> ocd_upstream ``` Decided to choose the latter. - src/target/riscv/riscv-013.c: ``` ++<<<<<<< HEAD + int abs_chain_position; + /* The base address to access this DM on DMI */ + uint32_t base; ++======= + unsigned int abs_chain_position; + ++>>>>>>> ocd_upstream ``` Decided to choose the latter (abs_chain_position is unsigned now) - src/target/riscv/batch.c: ``` ++<<<<<<< HEAD ++======= + void dump_field(int idle, const struct scan_field *field) + { ... + } ++>>>>>>> ocd_upstream ``` dump_field function is not needed anymore Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
2024-08-16Merge pull request #1114 from en-sc/en-sc/dup-dtmcontrolEvgeniy Naydanov4-81/+19
target/riscv: remove duplicate `dtmcontrol_scan()`
2024-08-15target/riscv: sys bus v1 fix for sizes greater than 4Parshintsev Anatoly1-4/+7
read_memory_bus_v1 incorrectly copied data to output buffer Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
generated by cgit v1.1 at 2025-09-20 22:34:27 +0000