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2023-11-18aarch64: Use 64-bit reads/writes to access SCTLR_EL1Peter Collingbourne1-2/+2
We were previously inadvertently clearing the top 32 bits of SCTLR_EL1 during read_memory/write_memory as a result of using 32-bit operations to access the register and because the fields used to temporarily store the register were 32-bit. Fix it. Change-Id: I657d7f949e1f7ab6bf90609e3f91cae09cade31a Signed-off-by: Peter Collingbourne <pcc@google.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7939 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-14target: move parent target structs just after common_magicTomas Vanek1-2/+2
Just a cosmetic refactoring. Change-Id: I7fbc05324e346fafc98d1b42691d33d3d8fbd04e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/7003 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2022-08-14target/aarch64: fix duplicate common magicTomas Vanek1-1/+1
AARCH64_COMMON_MAGIC was same as CORTEX_A_COMMON_MAGIC, probably copy pasta. Define unique AARCH64_COMMON_MAGIC Change-Id: Ie30e0028453a1fce5624ecad9bf73d5ac3791281 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6997 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-14target: consolidate existing target/algo common_magicTomas Vanek1-2/+2
Unify common_magic type to unsigned int Move common_magic to be the first member of the struct Add unsigned specifier to xxx_COMMON_MAGIC #defines Change-Id: If961d33232698529514ba3720e04418baf6dc6fe Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6996 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-07-23openocd: src/target: replace the GPL-2.0-or-later license tagAntonio Borneo1-14/+2
Replace the FSF boilerplate with the SPDX tag. The SPDX tag on files *.c is incorrect, as it should use the C99 single line comment using '//'. But current checkpatch doesn't allow C99 comments, so keep using standard C comments, by now. Change-Id: I255ad17235ff1e01bf0aa4deed4d944e1d693ddb Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7071 Tested-by: jenkins
2021-07-20target/arm: rename CamelCase symbolsAntonio Borneo1-1/+1
No major cross dependencies, mostly changes internal to each file/function. Change-Id: I3f0879f0f33c6badc36a0dc60229323978a7e280 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6338 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Xiang W <wxjstz@126.com>
2021-04-11target/aarch64: Add watchpoint supportLiming Sun1-0/+5
There are some breakpoint/watchpoint related code in armv8_dpm.c, but seems not working for aarch64. Target aarch64 has its own breakpoint implementation in aarch64.c. This commit follows the same logic to add watchpoint support for target aarch64. This commit also increases the size of stop_reason[] in function gdb_signal_reply() since the old size is too small to fit in a 64-bit address, such as ffff8000115e6980. Change-Id: I907dc0e648130e36b434220f570c37d0e8eb5ce1 Signed-off-by: Liming Sun <lsun@mellanox.com> Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com> Reviewed-on: http://openocd.zylin.com/4761 Tested-by: jenkins Reviewed-by: Liming Sun <limings@nvidia.com> Reviewed-by: Kevin Burke <kevinb@os.amperecomputing.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-01-16aarch64: add 'maskisr' commandMatthias Welwarsky1-0/+7
Allow to configure ISR masking during single-step and add handling for stepping over WFI with ISR masked. Change-Id: I7918be7bcda6a1d9badac44fc36c59b52f662fef Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4023 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2017-02-24aarch64: clean up struct aarch64_commonMatthias Welwarsky1-9/+0
remove some rarely or completely unused components. Change-Id: Id285bb7075901016297fa173a874db7f11a840d7 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3992 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-15aarch64: Fix #include guardsMarc Schink1-3/+3
Change-Id: I9445b04a210dcde5f8a7cf1560ef23eb53149178 Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3975 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2017-02-10aarch64: Add ARMv8 AARCH64 support filesDavid Ung1-0/+78
Add new AARCH64 target and ARMv8 support files. This is an instantiation from the cortex_a files but modified to support 64bit ARMv8. Not all features are complete, notably breakpts and single stepping are not yet implemented. Currently it lets you halt of the processors, resume, dump cpu registers, read/write memory and getting a stack trace with gdb. > halt invalid mode value encountered 5 target state: halted unrecognized psr mode: 0x5 target halted in ARM state due to debug-request, current mode: UNRECOGNIZED cpsr: 0x600001c5 pc: 0x00093528 MMU: disabled, D-Cache: disabled, I-Cache: disabled > targets TargetName Type Endian TapName State -- ------------------ ---------- ------ ------------------ ------------ 0* cpu0 aarch64 little cpu.dap halted > reg ===== arm v8 registers (0) r0 (/64): 0x00000000FFFFFFED (dirty) (1) r1 (/64): 0x00000000F76E4000 (2) r2 (/64): 0x0000000000000000 (3) r3 (/64): 0x0000000000010000 (4) r4 (/64): 0xFFFFFFC06E2939E1 (5) r5 (/64): 0x0000000000000018 (6) r6 (/64): 0x003A699CFB3C8480 (7) r7 (/64): 0x0000000053555555 (8) r8 (/64): 0x00FFFFFFFFFFFFFF (9) r9 (/64): 0x000000001FFEF992 (10) r10 (/64): 0x0000000000000001 (11) r11 (/64): 0x0000000000000000 (12) r12 (/64): 0x00000000000000F0 (13) r13 (/64): 0x00000000EFDFEAC8 (14) r14 (/64): 0x00000000F6DDA659 (15) r15 (/64): 0x0000000000000000 (16) r16 (/64): 0xFFFFFFC0000F9094 (17) r17 (/64): 0x0000000000000000 (18) r18 (/64): 0x0000000000000000 (19) r19 (/64): 0xFFFFFFC00087C000 (20) r20 (/64): 0x0000000000000002 (21) r21 (/64): 0xFFFFFFC000867C28 (22) r22 (/64): 0xFFFFFFC000916A52 (23) r23 (/64): 0xFFFFFFC00116D8B0 (24) r24 (/64): 0xFFFFFFC000774A0C (25) r25 (/64): 0x000000008007B000 (26) r26 (/64): 0x000000008007D000 (27) r27 (/64): 0xFFFFFFC000080450 (28) r28 (/64): 0x0000004080000000 (29) r29 (/64): 0xFFFFFFC00087FF20 (30) r30 (/64): 0xFFFFFFC000085114 (31) sp (/64): 0xFFFFFFC00087FF20 (32) pc (/64): 0xFFFFFFC000093528 (33) xPSR (/64): 0x00000000600001C5 And from gdb (gdb) bt #0 cpu_do_idle () at /mnt/host/source/src/third_party/kernel/3.14/arch/arm64/mm/proc.S:87 #1 0xffffffc000085114 in arch_cpu_idle () at /mnt/host/source/src/third_party/kernel/3.14/arch/arm64/kernel/process.c:107 #2 0x0000000000000000 in ?? () Change-Id: Iccb1d15c7d8ace7b9e811dac3c9757ced4d0f618 Signed-off-by: David Ung <david.ung.42@gmail.com> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
generated by cgit v1.1 at 2024-09-11 00:49:50 +0000