riscv-tools/riscv-openocd.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Collapse)	Author	Files	Lines
2019-01-24	WIP on hardware breakpoints.	Tim Newsome	1	-3/+17
	This is messy, but contains at least some bugfixes. 39/43 tests pass now. Change-Id: Ic9e8dad2a0ceb237e28c93906d1cd60876a5766d
2019-01-18	Don't reset current thread id on single step.	Tim Newsome	1	-13/+20
	Now passing 36/45 tests. Change-Id: I244b045f84397b058cf526e3bff238cb05d8ad06
2019-01-17	Fix reading of non-general registers for hwthread	Tim Newsome	1	-3/+36
	Previously the code made the assumption (which is valid for conventional RTOSs) that special registers (e.g. CSRs) are the same across threads. 26/45 tests pass. Change-Id: Ibb3398790d7354a995d506772375d869f608f1f0
2019-01-11	rtos support to write registers on current thread	Tim Newsome	1	-47/+49
	I don't understand how it was ever possible to change the registers on a thread that's not the current active one when a halt happened. Really instead of the RTOS tracking what the currently selected thread is, it would make more sense to have gdb_server do that and simply pass it along in every call to the RTOS layer. Now MulticoreRegTest passes. Change-Id: I399b9b2b05a147aa6b41463714ed3a39534b1fc8
2019-01-07	Implement hwthread_get_thread_reg_list.	Tim Newsome	1	-4/+22
	MulticoreRegTest now gets past the first check on all GPRs. Change-Id: I35f3c51273542668985f7a86965c1e947fc12194
2019-01-03	Neuter hwthread_get_thread_reg_list so it builds	Tim Newsome	1	-66/+6
	Change-Id: I07cf72ea1874ca7cb5557677ecb751c931174419
2019-01-02	rtos/hwthread: add hardware-thread pseudo rtos	Matthias Welwarsky	1	-0/+394
	This patch adds "hwthread", a pseudo rtos that represents cpu cores in an SMP system as threads to gdb. This allows to debug SMP system kernels in a more sensible manner and removes the current atrocities of switching gdb manually between CPU cores to update the context. Change-Id: Ib781c6c34097689d21d9e02011e4d74a4a742379 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Source: http://openocd.zylin.com/#/c/3999