aboutsummaryrefslogtreecommitdiff
path: root/src/flash
AgeCommit message (Collapse)AuthorFilesLines
2022-07-23openocd: src/flash: replace the GPL-2.0-or-later license tagAntonio Borneo110-1429/+220
Replace the FSF boilerplate with the SPDX tag. The SPDX tag on files *.c is incorrect, as it should use the C99 single line comment using '//'. But current checkpatch doesn't allow C99 comments, so keep using standard C comments, by now. Change-Id: Ic7db91fe37d1139d42c99e303b3243b6c8fe3ea2 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7067 Tested-by: jenkins
2022-07-23openocd: src: fix incorrect SPDX tagsAntonio Borneo2-2/+4
The SPDX tag is aimed at machine handling and it's thus expected to be placed in the first line in specific format. Move the SPDX tag to the first line and fix it where needed. The SPDX tag on files *.c is incorrect, as it should use the C99 single line comment using '//'. But current checkpatch doesn't allow C99 comments, so keep using standard C comments, by now. Change-Id: Ie9a05f530009d482a4116eebd147fd7e1ee3d41e Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7066 Tested-by: jenkins
2022-07-23openocd: src: fix incorrect GPL license tagAntonio Borneo1-2/+2
Use the standard SPDX tag, where it was incorrectly applied. The SPDX tag on files *.c is incorrect, as it should use the C99 single line comment using '//'. But current checkpatch doesn't allow C99 comments, so keep using standard C comments, by now. Change-Id: Iaec63abc6e0a38e5b0ae0ea7f5ecee7ca007bbbd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7065 Tested-by: jenkins
2022-07-23openocd: src: replace the GPL-2.0-only license tagAntonio Borneo1-12/+2
Replace the FSF boilerplate with the SPDX tag. Change-Id: I29f51caa5ae9854d05ce7e150d168a7002607cd1 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7064 Tested-by: jenkins
2022-07-23openocd: src: replace the GPL and BSD-Source-Code license tagsAntonio Borneo3-161/+37
Add the new license text in the license pool. Replace the GPL and BSD boilerplates with the SPDX tag. Add the copyright owner of Atmel, as it was explicitly listed in the BSD boilerplate text. The SPDX tag on files *.c is incorrect, as it should use the C99 single line comment using '//'. But current checkpatch doesn't allow C99 comments, so keep using standard C comments, by now. Change-Id: Ibb117dbf8402269be3e5ba4f4c472162494d813f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7062 Tested-by: jenkins
2022-07-23openocd: src: replace the GPL with eCos exception 2.0 license tagAntonio Borneo1-24/+2
Add the license exception text in the license pool. Add the exception chapter in license-rules.txt Replace the boilerplate with the SPDX tag. The SPDX tag on files *.c is incorrect, as it should use the C99 single line comment using '//'. But current checkpatch doesn't allow C99 comments, so keep using standard C comments, by now. Change-Id: Ied513b7c9c0722ed2a9c11dbdff3fbf59f1b41ce Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7061 Tested-by: jenkins
2022-07-23openocd: src: replace the BSD-3-Clause license tagAntonio Borneo1-27/+2
Replace the BSD boilerplate with the SPDX tag. The SPDX tag on files *.c is incorrect, as it should use the C99 single line comment using '//'. But current checkpatch doesn't allow C99 comments, so keep using standard C comments, by now. Change-Id: I5a8cab2051eee7eb99adf67f9631b0827c1359de Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7059 Tested-by: jenkins
2022-07-23openocd: src: add GPL license tag on files that miss itAntonio Borneo1-0/+2
Some file miss completely the license tag. Add the SPDX tag, using the same GPL-2.0-or-later license of the OpenOCD project. The SPDX tag on files *.c is incorrect, as it should use the C99 single line comment using '//'. But current checkpatch doesn't allow C99 comments, so keep using standard C comments, by now. Change-Id: I1fb51e722232d14f050458a820c3041de3dc9138 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7058 Tested-by: jenkins
2022-07-23openocd: build: add SPDX tagAntonio Borneo4-0/+8
Add the SPDX tag to makefiles, configuration scripts and tcl files present in the folders under src/ Change-Id: I1e4552aafe46ef4893d510da9d732c5f181784a4 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7051 Tested-by: jenkins
2022-06-24arm_adi_v5: add ap refcount and add get/put around ap useAntonio Borneo3-13/+59
While an ADIv5 DAP can only have 256 AP, ADIv6 can provide till 2**40 (1,099,511,627,776) AP per DAP. The actual trivial code implementation for ADIv5 (that uses an array of 256 ap in the struct adiv5_dap) cannot be extended as-is to handle ADIv6. The simple array of 256 AP can be reused as a dynamic storage for ADIv6 ap: - the ADIv5 AP number is replaced by the ADIv6 base address; - the index of the array (equal to ADIv5 AP number) has no link to any ADIv6 property; - the ADIv6 base_address has to be searched in the array of AP. The 256 elements in the AP array should be enough for any device available today. In future it can be easily increased, if needed. To efficiently use the 256 elements in the AP array, the code should associate one element of the array to an ADIv6 AP (through the AP base address), then cancel the association when the AP is not anymore needed. This is important to avoid saturating the AP array while exploring the device through 'dap apreg' commands. Add a reference counter in the struct adiv5_ap to track how many times the struct has been associated with the same base address. Introduce the function dap_get_ap() to associate and return the struct, and dap_put_ap() to release the struct. For the moment the code covers ADIv5 only, so the association is through the index. Use the two functions above and dap_find_get_ap() throughout the code. Check the return value of dap_get_ap(). It is always not NULL in the current ADIv5-only implementation, but can be NULL for ADIv6 when there are no more available AP in the array. Instrument dap_queue_ap_read() and dap_queue_ap_write() to log an error message if the AP has reference counter zero, meaning that the AP has not been 'get' yet. This helps identifying AP used without get/put, e.g. code missed by this patch, or merged later. Instrument dap_cleanup_all() to log an error message if an AP has reference counter not zero at openocd exit, meaning that the AP has not been 'put' yet. Change-Id: I98316eb42b9f3d9c9bbbb6c73b1091b53f629092 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6455 Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com> Tested-by: jenkins
2022-06-10flash/nor/numicro: remove useless architecture checkTomas Vanek1-7/+0
target_to_armv7m() just returns a type-cast of target->arch_info, so the test has no value. Following target_run_algorithm() checks magic number so we need not worry about execution on mismatched architecture. Change-Id: Ic9892a488a42af1d8e8731eddb39240deeb26020 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6755 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-06-04flash/stm32l4x: fix scan-build warningsTarek BOCHKATI1-42/+47
fix "Declared variable-length array (VLA) has zero size" warnings while at there instrument the probe function to ensure the flash bank contains at least 1 sector Change-Id: I3ba0e6345881557ad1aab2d1b41eee438b49fe04 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6470 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-05-29flash/nor/core, target: don't ask for working mem if no target algoTomas Vanek1-1/+5
The command 'flash erase_check' showed the message 'Running slow fallback erase check - add working memory' even in the case the target didn't implement blank_check_memory. Change return code of target_blank_check_memory() in this case and sense it in default_flash_blank_check() and show a message without a request for working memory. Change-Id: I7cf9bf77742964b4f377c9ce48ca689e57d0882f Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6765 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com>
2022-05-21flash: fix clang static analyzer build errorsErhan Kurubas2-5/+0
Fixes "variable set but not used" errors. Tested with Homebrew clang version 13.0.1 Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: Ia90baf5b4857db2b5569ebe6adbbb832de772aad Reviewed-on: https://review.openocd.org/c/openocd/+/6971 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-05-07bluenrg: add support for bluenrg-lps device and boardSalvatore Giorgio PECORINO1-3/+16
Added bluenrg-lps support Added file for the board steval-idb012v1 Fixed size_info information using a mask Changed the if condition in bluenrg-x.cfg to be valid only for bluenrg-1 and bluenrg-2 Signed-off-by: Salvatore Giorgio PECORINO <salvatore-giorgio.pecorino@st.com> Change-Id: Ic0777ec0811ee6fac7d5e1d065c4629e47d84a1f Reviewed-on: https://review.openocd.org/c/openocd/+/6928 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-04-24flash/nor/stm32f1x: add can_load_options flag for GD32F1x0, F3x0 and E23xTomas Vanek1-0/+3
According to GigaDevice user manuals the devices have OBRLD bit in FMC_CTL register which is functionally compatible with OBL_LAUNCH @ FLASH_CR of STM32 counterparts. Change-Id: I84d231b38815fcb6452fd73b9153b269cce3b737 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6759 Tested-by: jenkins Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
2022-04-24flash/stm32f1x: add support for RISC-V GigaDevice GD32VF103Tomas Vanek1-44/+161
The device has compatible flash macro with STM32F1 family, reuse stm32f1x driver code. Detect non-ARM target - for simplicy test target type name 'riscv' and the address has 32 bits. In case of RISC-V CPU use simple chunked write algo - async algo cannot be used as the core implemented in this device doesn't allow memory access while running. Change-Id: Ie3886fbd8573652691f91a02335812a7300689f7 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6704 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com>
2022-04-13flash/nor/stm32f1x: lock flash in case of errorTomas Vanek1-39/+46
The current code locks the flash controller in case of error during flash write only. An error in other flash operations may cause the flash is left unlocked. Implement locking also after error in erase, mass erase, options write and erase. Change-Id: I26c2ed7914e7847122306f29b777b9eefd1dc580 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6710 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-04-13flash/nor/stm32f1x: unify flash error reportingTomas Vanek1-17/+15
stm32x_wait_status_busy() has two side effects in case of flash programming error: - reports error - clears error bit in status register Use stm32x_wait_status_busy() to report also flash error during target algo flash write. While on it use more descriptive error codes in stm32x_wait_status_busy(). Change-Id: I6e1cffc2aa5411b918a23ed62d5194910888a9d1 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6709 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-04-13flash/nor/stm32f1x: tidy up async algo supporting codeTomas Vanek1-21/+26
Use target_get_working_area_avail() instead of try-fail iteration. Call destroy_reg_param() in a for cycle. Change-Id: I1891d1ffdea99010c6ab66b9578400b9d7922e20 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6708 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-04-13flash/nor/stm32f1x: remove write alignment codeTomas Vanek1-23/+14
Use flash infrastructure to ensure writes are halfword aligned. Change-Id: Iddca3a256ace3486a23e1a9cb6a31c7a91ee58bf Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6707 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-04-13flash/nor/stm32f1x: allow write fallback for flash optionsTomas Vanek1-34/+50
Mostly refactoring. Rename original stm32x_write_block() to stm32x_write_block_async() as it uses target async algo. Introduce new stm32x_write_block() and move slow, host controlled fallback flash write there. The change allows stm32x_write_options() to use slow flash write fallback. While on it rename variables where halfword count is stored. Change-Id: I386ae15cf052b1490461ed8f7eea5b4403d466f7 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6706 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-03-19flash/stm32l4x: fix auto-probe when RDP is promoted from 0 to 0.5Tarek BOCHKATI1-2/+13
Considering this use case: (using STM32 L5 or U5) 1- first probe : TZEN enabled, RDP level 0 flash_regs_base |= STM32L5_REGS_SEC_OFFSET => 0x50022000 2- the user promotes the RDP to level 0.5 3- the second probe, fails to read OPTR using secure flags_regs_base: used OPTR address is 0x50022040 Step 3 fails because when RDP is level 0.5, we should use Non-Secure flash registers. To fix this, always use NS flash regs to read OPTR in probe functions. Fixes: 80d323c6e82b (flash/stm32l4x: introduce auto-probe when OPTR is changed) Change-Id: I296aa633972b0c410b927488c999584a07b912d3 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6864 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2022-03-12flash/nor/efm32: Use Cortex-M 'core_info' fieldMarc Schink1-11/+7
Change-Id: I5e477036e5cb7518c35df88878d53261311deb40 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/6868 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-12flash/nor/sim3x: Fix typoMarc Schink1-1/+1
Change-Id: I2143c81d44b49bed9585c4aaee2bb6e2165345f2 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/6869 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-03-12flash/stm32h7x: fix FLASH_WPSN_PRG mask used for protectionTarek BOCHKATI1-1/+2
STM32H7Ax/7Bx devices have a different WPSN mask (0xFFFFFFFF), (0xFF for STM32H74x/75x and STM32H72x/73x devices). And when supporting STM32H7Ax/7Bx devices, stm32x_protect() was not updated accordingly. Change-Id: I081217af3e5ed815b67bfdfec7f4ebaa3152a865 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Fixes: 0b7eca17691a (flash/stm32h7x: add support of STM32H7Ax/H7Bx devices) Reviewed-on: https://review.openocd.org/c/openocd/+/6858 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2022-03-12flash/stm32f1x,f2x: fix endianess in slow fallback flash writeTomas Vanek2-8/+2
Use target_write_memory() instead of target_write_u16() Change-Id: I2389fe7a5fa18c9bc9c1aad8b8ddd64608bf2566 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6705 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-01flash/stm32l4x: fix maybe-uninitialized compiler errorTarek BOCHKATI1-1/+1
using gcc (Ubuntu 9.3.0-17ubuntu1~20.04) 9.3.0 we get: error: ‘retval’ may be used uninitialized in this function fixes: 13cd75b6ecfd (flash/nor/stm32xx: fix segfault accessing Cortex-M part number) Change-Id: I897c40c5d2233f50a5385d251ebfa536023e5cf7 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6861 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-25flash/nor/stm32xx: fix segfault accessing Cortex-M part numberTomas Vanek4-16/+39
Some of STM32 flash drivers read Cortex-M part number from cortex_m->core_info. In corner cases the core_info pointer was observed uninitialised even if target_was_examined() returned true. See also [1] Use the new and safe helper to get Cortex-M part number. While on it switch also target_to_cm()/target_to_armv7m() to the safe versions. This prevents a crash when the flash bank is misconfigured with non-Cortex-M target. Add missing checks for target_was_examined() to flash probes. [1] 6545: fix crash in case cortex_m->core_info is not set https://review.openocd.org/c/openocd/+/6545 Change-Id: If2471af74ebfe22f14442f48ae109b2e1bb5fa3b Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Fixes: f5898bd93ff8 (flash/stm32fxx.c: do not read CPUID as this info is stored in cortex_m_common) Reviewed-on: https://review.openocd.org/c/openocd/+/6752 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-02-25flash/nor/stm32f2x: Fix erase of bank 2 sectorsSimon Johansson1-2/+2
This commit corrects the erase function for stm32f2x when dealing with sectors in bank 2, for STM32F42x/43x devices with 1MB flash. On STM32F42x/43x with 1MB flash in dual bank configuration, the sector numbering is not consecutive. The last sector in bank 1 is number 7, and the first sector in bank 2 is number 12. The sector indices used by openocd, however, _are_ consecutive (0 to 15 in this case). The arguments "first" and "last" to stm32x_erase() are of this type, and so the logic surrounding sector numbers needed to be corrected. Since the two banks in dual bank mode have the same number of sectors, a sector index in bank 2 is larger than or equal to half the total number of sectors. Change-Id: I15260f8a86d9002769a1ae1c40ebdf62142dae18 Signed-off-by: Simon Johansson <ampleyfly@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6810 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-01-29flash/nor/atsame5: add LAN9255 devicesHans-Erik Floryd1-0/+3
Support Microchip LAN9255 devices with embedded SAME53J MCU. Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com> Change-Id: Ia811c593bf7cf73e588d32873c68eb67c6fafad7 Reviewed-on: https://review.openocd.org/c/openocd/+/6811 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-01-05flash/nor/efr32: fixed lockbits and user dataDoug Brunner1-83/+221
Changed flash driver to support writing to the user data page, as well as to any portion of the lockbits page above 512 bytes (the amount used for the actual page lock words). The top part of the lockbits page is used on at least the EFR32xG1 chips for the SiLabs bootloader encryption keys. As presented to the user, the lockbits page is the same size as the other pages, but any attempt to write to its low 512 bytes is an error. To enforce this, efr32x_write is renamed to efm32x_priv_write and a wrapper function is provided in its place. If the user erases the lockbits page, the driver rewrites the cached lock words after the erase. When the driver erases the lockbits page in order to update the lock words, it first takes a copy of anything stored in the top part of the page, and re-programs it after the erase operation. There are now multiple instances of flash_bank for each target, and the flash_bank instances must share their cached lock words to operate as intended. Therefore, when a bank is created, the global flash bank list is used to find any other banks that share the same target. Since some banks in the global list are invalid at the time free_driver_priv is called, reference counting is used to decide when to free driver_priv. To avoid the need to find the lockbits flash_bank from another flash_bank, efm32x_priv_write and efm32x_erase_page now take an absolute address. There didn't seem to be any reason to prohibit unprotecting individual flash pages, so that limitation is removed from efm32x_protect(). This addresses ticket #185. Valgrind-clean, except for 2x 4kiB not freed/still reachable blocks that were allocated by libudev. No new Clang analyzer warnings, no new sanitizer warnings. Signed-off-by: Doug Brunner <doug.a.brunner@gmail.com> Change-Id: Ifb22e6149939d893f386706e99b928691ec1d41b Reviewed-on: https://review.openocd.org/c/openocd/+/6665 Tested-by: jenkins Reviewed-by: Fredrik Hederstierna <fredrik.hederstierna@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-12-11flash/nor/spi: add micron MT25QU01GJaehoon Park1-0/+1
1Gbit SPI flash on VCU118 Rev. 2.0 Contributed to riscv-openocd in https://github.com/riscv/riscv-openocd/pull/487 Signed-off-by: Tim Newsome <tim@sifive.com> Change-Id: I93447dd970d9901a671567fe8ab9e407432f8db9 Reviewed-on: https://review.openocd.org/c/openocd/+/6764 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2021-12-03target,flash: allow target_free_working_area on NULL area pointerTomas Vanek7-23/+22
Standard C library free() allows NULL pointer as a parameter. Change target_free_working_area() to conform this convention. Remove NULL pointer tests before target_free_working_area() calls. While on it add missing setting pointer to NULL after target_free_working_area(). Change-Id: I7c692ab04a9933398ba5bc614723ad0bdecb87b3 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6712 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-03flash/nor/fespi: algorithm, large address, errorsTim Newsome1-327/+148
* Move more smarts into the target algorithm code, and rewrite that in C so it's easier to understand/maintain. * Support >24-bit addresses. * Check for errors. Change-Id: I3b1a143589fe6defafb8f95820aa682acc9646e7 Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6679 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-12-03flash/nor/at91samd: remove 'at91samd info' commandTomas Vanek1-13/+0
The command is a stub only, does nothing. Change-Id: Ib3b8c2122a9f6f2e179bee34ac56d0adf367bfcc Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6730 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-03flash/nor/kinetis_ke: remove 'kinetis mdm test_securing' cmdTomas Vanek1-40/+0
The command might be a leftover from development of the driver. There is no documentation what it does. Change-Id: Iaa5aa1ac51638bd6acce172a5dd03846a165dc27 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6728 Tested-by: jenkins Reviewed-by: Ivan-Artekit <ivan@artekit.eu>
2021-12-03flash/nor/kinetis_ke: add .help fields for tcl commandsTomas Vanek1-4/+4
Add help texts from similar driver kinetis.c While on it fix one existing help: the flash is obviously not NAND Change-Id: Ibd295105586b008aaabf2fb4e4a75bf551266e38 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6727 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-11-29flash/nor/efm32: fixed BG1x identificationDoug Brunner1-3/+3
The EFM32 flash driver misidentifies the EFR32BG1B on my board as EFR32MG1B. Looks like this was caused by a copy-paste error, fixed. Signed-off-by: Doug Brunner <doug.a.brunner@gmail.com> Change-Id: I3067f7ba132c2562487da8c2371f63a4843230c1 Reviewed-on: https://review.openocd.org/c/openocd/+/6666 Tested-by: jenkins Reviewed-by: Fredrik Hederstierna <fredrik.hederstierna@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-23flash/psoc6: initialize usage fieldAntonio Borneo1-1/+1
The missing initialization triggers a run-time error message: Error: BUG: command 'psoc6 reset_halt' does not have the '.usage' field filled out Change-Id: I975e4ba99bd939aa924a9d62b1ab76b2ab5bf193 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6720 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-23flash/rp2040: don't initialize to NULL fields in structAntonio Borneo1-1/+0
When a struct is initialized, missing fields are already filled with zero or NULL. This change simplifies scripts to compare documentation and registered commands. Change-Id: I96fbdfa98bbb1f2b5e2a9532faf5a15cb5bc28dd Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6719 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-23openocd: use unique name for struct command_registrationAntonio Borneo3-12/+12
Just to avoid name clash when comparing documentation with registered commands through scripts. Change-Id: I8832545d8d9236ea5dabe6e73732f51e5246caff Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6717 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2021-11-23openocd: use single line for register_commands*()Antonio Borneo2-4/+2
Do not split in multiple lines the calls to register_commands*(). No change in code behaviour, just make it easy to grep in the code and identify the commands that can be registered. This would help detecting undocumented commands. Change-Id: Id654e107cdabf7ee31fc3d227c1d2a59acc5669e Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6716 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-18flash/nor/at91samd: Add SAMR35J18B supportJanco Kock1-0/+1
Add support for the mcu SAMR35J18B Signed-off-by: Janco <janco@factorylab.nl> Change-Id: I45d801485ad1c16d1b3086516a2b6d71d13f3fc7 Reviewed-on: https://review.openocd.org/c/openocd/+/6664 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2021-11-15flash/nor/stm32f1x: Add support for GD32E23xasier702-2/+20
GD32E23x from GigaDevice is cortex-M23 microcontroller and it can work with the stm32f1x driver. Modifications are similar to this done for GD32F1x0 in #6164 (https://review.openocd.org/c/openocd/+/6164). Configuration file is added because its cortex-M23 CPU ID is different. I think that GigaDevice microcontrollers should be handled in an independent unit to separate them from STM32, but nowadays quick solution is welcome. Signed-off-by: asier70Andrzej Sierżęga <asier70@gmail.com> Change-Id: I91f31f5f66808bc50a8f607ac2c107e6b7c5e2b8 Reviewed-on: https://review.openocd.org/c/openocd/+/6527 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-13jtagspi: fix build on MacOSAntonio Borneo1-2/+2
Commit be57b0ab847e ("Update jtagspi driver for 1-, 2- and 4-byte addresses") introduces two incorrect format string for uint32_t data types. This cause build failure on MacOS: src/flash/nor/jtagspi.c:474:35: error: format specifies type 'unsigned char' but the argument has type 'uint32_t' (aka 'unsigned int') [-Werror,-Wformat] LOG_DEBUG("status=0x%02" PRIx8, *status); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~ src/flash/nor/jtagspi.c:513:65: error: format specifies type 'unsigned char' but the argument has type 'uint32_t' (aka 'unsigned int') [-Werror,-Wformat] LOG_ERROR("Cannot enable write to flash. Status=0x%02" PRIx8, status); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~ Fix the format string. Change-Id: I209053317c8b26c35c6f11be0553ccccc698c551 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: be57b0ab847e ("Update jtagspi driver for 1-, 2- and 4-byte addresses") Reviewed-on: https://review.openocd.org/c/openocd/+/6701 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2021-11-13flash/stm32h7x: don't read flash size using the H74/H75x CPU2Tarek BOCHKATI1-6/+11
CPU2 (Cortex-M4) cannot read flash size register. assume the maximum flash size without triggering an error message Change-Id: I5c3328b7cc42e3aa57165075021227d7936f3d26 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6670 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-11-13flash/stm32h7x: avoid using magic numbers for device idsTarek BOCHKATI1-20/+25
Change-Id: I4d682ee828404974abd9a42f98b840d77835cfe0 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6669 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2021-11-12Update jtagspi driver for 1-, 2- and 4-byte addressesAndreas Bolsch1-90/+443
jtagspi driver always used 3-byte addresses regardless of actual device capcity. Now select 1- to 4-byte addresses depending on device capacity. Some devices need a special command to activate the 4-byte address mode, a special command to accomplish this, and a further command for setting device properties are added. Additionally, restriction (start of range had to be page aligned) removed. Tested with XCS6SLX16 board and W25Q256FV in 3- and 4-byte address modes. Change-Id: I88b2877517a18dac460253ae6d97f3dded054e6c Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/4876 Reviewed-by: Jan Matyas <matyas@codasip.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: zapb <dev@zapb.de> Tested-by: jenkins
2021-11-03flash/nor/stm32lx: fixed writes at high adapter speedsJimmy1-4/+21
The busy flag must be polled after each half-page write. At low clock speeds, no issue is observed when the poll is omitted, because the writes complete before the next write begins. But at high clock speeds the subsequent writes would overlap and cause the operation to fail. The status polls are done on the target for efficiency, since the half-pages are very small. Change-Id: Ia1e9b4a6a71930549b3d84a902744ce6e596301b Signed-off-by: Jimmy <nhminus@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/5598 Tested-by: jenkins Reviewed-by: Jelle De Vleeschouwer Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>