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2023-11-11tcl/target/ti_k3: Sort the SoC documentation alphabeticallyNishanth Menon1-10/+10
Sort the documentation for the TI K3 parts alphabetically. Change-Id: I2c40714ad590e3d9232a6f915c157d677e0c3610 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7945 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-11-11tcl/target/ti_k3: Make Cortex-A processors optionalNishanth Menon1-16/+18
The AM2x family of K3 SoCs typically do not contain a Cortex-A53 or A72 processor. So, make the cpu "up" functions available when armv8 processor count > 0. Change-Id: I985b194fe7cc63e4134ad84ccd921cc456eb412f Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7944 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11tcl/target/ti_k3: Convert memory access ap port num as a variableNishanth Menon1-1/+4
Convert the memory access ap port num as a variable to allow support for the AM2x family of K3 SoCs. Change-Id: Ibd96c94055721f60d95179dab21d014c15b0f562 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7943 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-11-11tcl/target/ti_k3: Convert Cortex-R5 ap port num as a variableNishanth Menon1-2/+3
Convert the Cortex-R5 ap port num as a variable to allow support for the AM2x family of K3 SoCs. Change-Id: I7dc8b459dca8b5f21395230b5cb782b14538bd48 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7942 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-11-11tcl/target/ti_k3: Convert sysctrl ap port num as a variableNishanth Menon1-2/+5
Convert the sysctrl ap port num as a variable to allow support for the AM2x family of K3 SoCs. Change-Id: I1b5b55e48240e6654779dd636fdf07bca055e192 Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7941 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11target: Add a debug_reason commandPeter Collingbourne2-0/+31
This allows programmatically determining the debug reason. Change-Id: I0c3e85cebb6dc28fc0fc212beca84a484ac654a5 Signed-off-by: Peter Collingbourne <pcc@google.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7952 Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-11-11target/breakpoints: make breakpoint_watchpoint_remove_all staticErhan Kurubas1-1/+1
Fixes below Sparse tool warning. warning: symbol 'breakpoint_watchpoint_remove_all' was not declared. Should it be static? Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I4af1d5aa54abcb45f746b877513ba0b5fccbeb47 Reviewed-on: https://review.openocd.org/c/openocd/+/7955 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
2023-11-11target: fix a memory leak in image_openEvgeniy Naydanov1-8/+14
Change-Id: I629be26e7752858091ad58c2b3b07f43e22e8c23 Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7935 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-11-11target/mips32: update mips32 config register parsingWalter Ji2-7/+321
Enhance `mips32_read_config_regs` to better detect MIPS32 ISA, DSP, and FPU features, allowing user to get more detailed target information. Most of these information will be used in MIPS m/iAptiv support. Change-Id: I23571a626ec64fa019acac91bdbfcb434373bfc1 Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7911 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2023-11-11target: Fix get_reg, prevent returning invalid dataMarek Vrbka1-1/+1
This patch forces a read of register from the target in the get_reg command in case the register cache does not hold a valid value at that moment. Note that the command "reg" already handles it correctly, no fix is needed there. Change-Id: I75fad25188e94ee4e06162ab6d600ea24dbf590a Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7958 Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Reviewed-by: zapb <dev@zapb.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-11-11tcl/board: add board configuration for Advantech IMX8QM DMSSE20Oliver Graute1-0/+23
Change-Id: Iebf2a901b428cf3b99110aea0f3ab0e1f17b0250 Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7974 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: zapb <dev@zapb.de>
2023-11-11target/target: Use boolean values for 'valid' flagMarc Schink1-2/+2
Change-Id: Ieaa25b9ef0997c0f75ddfb652325c1a9e53a8d8d Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/7959 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2023-11-11jep106: update to revision JEP106BH September 2023Antonio Borneo1-4/+51
The original documents from Jedec since JEP106BG, do not report the entry for "21 NXP (Philips)", replaced by "c". It's clearly a typo. Keep the line from JEP106BF.01 for "NXP (Philips)". Change-Id: I273c8c5ecf48336ce5189b484a7236273ba90184 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7954 Tested-by: jenkins
2023-10-27OpenOCD memory leak in `hwthread_update_threads()`Kirill Radkin1-0/+1
Update `os_free()` from `rtos/rtos.c:96` to fix memory leaks Change-Id: Id7b4c775291b735a0b4423151c2930afce6bf0bd Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7934 Reviewed-by: Tim Newsome <tim@sifive.com> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-10-27flash/nor/spi: add guide to select proper erase cmdTomas Vanek1-4/+21
Extend comments in flash_devices array. Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Change-Id: I7ab85a2d37803b6bc9fc7a2a91ae2effb6ec288d Reviewed-on: https://review.openocd.org/c/openocd/+/7925 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2023-10-25jtag/drivers: Extension of jtag_libusb_openEasyDevKits15-17/+29
In jtag_libusb_open I've added a parameter for delivering the device description for which this function should search and adjusted all callers of this function. A new driver for WCH CH347 JTAG chips will use this new parameter. See also: https://review.openocd.org/c/openocd/+/7937 Change-Id: I85e1d7b1f7912ba5e223f0f26323ff3b7600e17d Signed-off-by: EasyDevKits <info@easydevkits.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7938 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-25tools/scripts: iManufacturer added to camelcase.txtEasyDevKits1-0/+1
The iManufacturer is also a member of structure libusb_device_descriptor. No need to output a check message by checkpatch.sh Change-Id: Ibbb2eb9cde3482c8d4d6ea784f51a973eb36f8c5 Signed-off-by: EasyDevKits <info@easydevkits.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7936 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-10-25target/mips32: check read regs result in save contextWalter Ji1-1/+5
Add result check for mips32_pracc_read_regs in mips32_save_context. Change-Id: Ie796d2b05a9feb11e246c2d0771b52cad4fb70db Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7932 Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-25target/mips32: rework mips core register related functionsWalter Ji6-173/+508
Update mips core definitions. Reworked mips core register structure and read/write function. Add coprocessor0 register definitions for target configuration. Change-Id: I59c1f4cc4020db8a78e8d79f7421b87382fa1709 Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7864 Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-14target: check if target is not examined on reg commandParshintsev Anatoly1-0/+4
Change-Id: I46093c85374986a36d10eaac38b98bd5e05835ca Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7841 Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
2023-10-14server/gdb_server: Log gdb index in debug messages.Tim Newsome1-13/+20
This makes it easier to look at log files where multiple gdb instances are connected. Change-Id: Ic5aca52b32ee03ac35ffbed9a2fc552abb0a1cba Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7895 Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-10-14target: Change the watchpoint type print from number to letterMarek Vrbka1-2/+3
Previously, when listing the watchpoints, OpenOCD printed numbers 0, 1 and 2 representing READ, WRITE and ACCESS type watchpoints. This patch changes it to 'r', 'w' and 'a'. This increases the clarity as what type the watchpoint actually is. Change-Id: I9eac72dfd0bb2a9596a5b0c080a3f584556ed599 Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7909 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2023-10-14breakpoints: add rwp all commandMarek Vrbka4-41/+93
This patch adds the "all" option to the rwp command. It removes all watchpoints, much like rbp all removes all breakpoints. Change-Id: Id58dd103085e558f17afa4a287888cf085566ca9 Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7907 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-14command: Prepend logs during command captureMarek Vrbka2-13/+15
Previously, if you ran a tcl command in capture like so: "capture { reg 0x1000 hw }" Such command did overwrite the tcl result if LOG_LVL_INFO or lower was logged during it. This patch changes it by prepending the log to the tcl result instead. As the tcl results should not be lost during capture. Change-Id: I37381b45e15c931ba2844d65c9d38f6ed2f6e4fd Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7902 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2023-10-14target: Fix an issue with rwp/rbp command in smp targetsKirill Radkin1-4/+8
If wp/bp is missing at address rwp/rbp won't return zero code (on smp). Now it fixed. Fixes: 022e438292de ("target: Change policy of removing watchpoints/breakpoints.") Change-Id: I3a3c245f7088fc23227b286d2191fc7f3edba702 Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7910 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-14arm_opcode: Add support for ARM MCRR/MRRCFlorian Fainelli6-0/+262
Add support for the ARM MCRR/MRRC instructions which require the use of two registers to transfer a 64-bit co-processor registers. We are going to use this in a subsequent patch in order to properly dump 64-bit page table descriptors that exist on ARMv7A with VMSA extensions. We make use of r0 and r1 to transfer 64-bit quantities to/from DCC. Change-Id: Ic4975026c1ae4f2853795575ac7701d541248736 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Michael Chalfant <michael.chalfant@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/5228 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-07target/nrf52: Create and configure TPIUFrank Plowman1-0/+49
Firstly, create the TPIU nrf52.tpiu if using the nrf52 target. This is standard, using AP 0 and TPIU base address 0xE0040000. Secondly, add a pre_enable handler for this TPIU which configures the TRACEMUX field of the TRACECONFIG register. This register is reset every time the MCU resets, so the pre_enable handler creates a reset-end handler to ensure the register remains set. Change-Id: I408b20fc03dc2060c21bad0c21ed713eee55a113 Signed-off-by: Frank Plowman <post@frankplowman.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7901 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-10-07tcl/target/ti_k3: Add AXI-AP port for direct SoC memory map accessNishanth Menon1-0/+3
While we can read and write from memory from the view of various processors, all K3 debug systems have a AXI Access port that allows us to directly access memory from debug interface. This port is especially useful in the following scenarios: 1. Debug cache related behavior on processors as this provides a direct bypass path. 2. Processor has crashed or inaccessible for some reason (low power state etc.) 3. Scenarios prior to the processor getting active. 4. Debug MMU or address translation issues (example: TI's Region Address Table {RAT} translation table used to physically map SoC address space into R5/M4F processor address space) The AXI-AP port is the same for all processors in TI's K3 family. To prevent a circular-loop scenario for axi-ap accessing debug memory with dmem (direct memory access debug), enable this only when dmem is disabled. Change-Id: Ie4ca9222f034ffc2fa669fb5124a5f8e37b65e3b Reported-by: Dubravko Srsan <dubravko.srsan@dolotron.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7899 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-10-07tcl/target/ti_k3: Introduce RTOS array variable to set various CPU RTOSesNishanth Menon1-4/+17
The Texas Instruments' K3 devices are a mix of AMP and SMP systems. The operating systems used on these processors can vary dramatically as well. Introduce a RTOS array variable, which is keyed off the cpu to identify which RTOS is used on that CPU. This can be "auto" or "hwthread" in case of SMP debug etc. For example: AM625 with an general purpose M4F running Zephyr and 4 A53s running SMP Linux could be invoked by: openocd -c 'set V8_SMP_DEBUG 1' -c 'set RTOS(am625.cpu.gp_mcu) Zephyr' \ -c "set RTOS(am625.cpu.a53.0) hwthread" -f board/ti_am625evm.cfg Change-Id: Ib5e59fa2583b3115e5799658afcdd0ee91935e82 Reported-by: Dubravko Srsan <dubravko.srsan@dolotron.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7898 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-07tcl/target/ti_k3: Add coreid identification to SMP processorsDubravko Srsan1-1/+1
Describe the SMP Armv8 cores in SMP configuration with coreid explicitly called out. This allows for gdb session to call the smp behavior clearly. Change-Id: Ie43be22db64737bbb66181f09d3c83567044f3ac Signed-off-by: Dubravko Srsan <dubravko.srsan@dolotron.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7897 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-10-07tcl/target/ti_k3: Fix smp target descriptionDubravko Srsan1-1/+1
When _v8_smp_targets is used with V8_SMP_DEBUG=1, describe the targets as SMP targets. However, the variable expansion is not in the context of a proc, and a typo in referring to global $_v8_smp_targets causes this to fail. Just refer to $_v8_smp_targets directly. Change-Id: Iffe5fd2703bed6a9c840284285e70b8a8ce84e17 Signed-off-by: Dubravko Srsan <dubravko.srsan@dolotron.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7896 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-10-07target: return error if attempting to access non-existing registersParshintsev Anatoly1-2/+2
Change-Id: Ic22edcab46d21dbc71f78275a78bdea9c2bcc394 Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7886 Reviewed-by: Tim Newsome <tim@sifive.com> Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-10-07target/arc: do not invalidate icache when (un)setting breakpointsArtemiy Volkov1-6/+0
Currently, instruction cache is being invalidated in arc_{un,}set_breakpoint() regardless of whether the breakpoint's type is HW or SW. For SW breakpoints, this has no net effect as the caches are flushed as a by-product of overwriting instructions in main memory and is thus merely unnecessary; but for HW breakpoints this invalidation is not preceded by a flush and might lead to loss of data. This patch removes the invalidate() call altogether to correct this undesired behavior for HW breakpoints. With this patch applied, all supported HW breakpoint tests from the gdb testsuite are now passing with the arc-openocd backend. Change-Id: I3d252b97f01f1a1e2bf0eb8fb257bdab0c544bc2 Signed-off-by: Artemiy Volkov <artemiy@synopsys.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7767 Tested-by: jenkins Reviewed-by: Evgeniy Didin <didin@synopsys.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-07armv8_dpm: fix registers read at debug entryAntonio Borneo1-2/+9
The comment above armv8_dpm_read_current_registers() doesn't match the implementation, as the function reads all the registers from ARMV8_PC and above. The registers currently read are not relevant to answer to the usual GDB initial request through the 'g' packet. Plus the lack of differentiation per core state (AArch32 vs AArch64) causes the read of not existing registers in AArch32 triggering errors, as tentatively fixed by https://review.openocd.org/5517/ Fix the code to read the registers initially required by GDB. Modify the comment to report the register list in AArch32 and in AArch64. Keep the extra checks inside the read loop, even if they are mostly irrelevant; this could prevent errors if someone needs to extend the number of registers to read. The current implementation of the register's description in OpenOCD does not allow to discriminate among AArch32 and AArch64 registers. Add a TODO comment to highlight it. Change-Id: Icd47d93c19a9e1694a7b51bbc5ca7e21a578df41 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7887 Tested-by: jenkins
2023-10-02target/cortex_m: support Infineon Cortex-M33 from SLx2 MCUAhmed Boughanmi3-13/+20
The secure microcontroller Infineon SLx2 uses a custom Cortex-M33. The register CPUID reports value 0x490FDB00. Reference link to the product: Link: https://www.infineon.com/cms/en/about-infineon/press/market-news/2022/INFCSS202211-034.html Change-Id: I8911712c55bd50e24ed53cf49958352f470027a5 Signed-off-by: Ahmed Boughanmi <boughanmi.external@infineon.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7879 Reviewed-by: Karl Palsson <karlp@tweak.au> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-10-02image: log error when unknown image type is specifiedMarek Vrbka1-7/+9
This patch adds error reporting when unknown image type is specified. Previously, OpenOCD replied with an empty string. Change-Id: I16220b1f5deb3b966a21731f0adf7911a78e8959 Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7883 Tested-by: jenkins Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-09-23jtag/drivers/bcm2835gpio: fix bcm2835_peri_base output formatVincent Fazio1-1/+1
Previously, the bcm2835_peri_base value would be printed as a decimal value despite having a "0x" prefix, implying it should be a hex value. BCM2835 GPIO: peripheral_base = 0x1056964608 Now, the value is correctly converted to hexidecimal. BCM2835 GPIO: peripheral_base = 0x3F000000 Change-Id: Id59185423917e6350f99ef68320e2102a3192291 Fixes: b41b368255d5 ("jtag/drivers/bcm2835gpio: extend peripheral_base to off_t") Signed-off-by: Vincent Fazio <vfazio@xes-inc.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7888 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23tcl/target: add support for Cavium Octeon II CN61xxPeter Mamonov1-0/+15
Change-Id: Ia14854bc64f5a31b6591be69be4edee9cd1310c3 Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/5249 Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23tcl/target: Add XLP3xx configuration filesPeter Mamonov4-0/+60
The patch adds configuration files for the following XLP 300-series processors: XLP304, XLP308, XLP316. Change-Id: Iaf2b807abf9fc4d7b51222fd40bdb18c6aca7d9c Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru> Signed-off-by: Peter Mamonov <pmamonov@gmail.com> CC: Antony Pavlov <antonynpavlov@gmail.com> CC: Dongxue Zhang <elta.era@gmail.com> CC: Oleksij Rempel <linux@rempel-privat.de> CC: Paul Fertser <fercerpav@gmail.com> CC: Salvador Arroyo <sarroyofdez@yahoo.es> CC: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: https://review.openocd.org/c/openocd/+/2323 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23target/adi_v5_xxx: use ADIV5_DP_SELECT_APBANKTomas Vanek2-3/+3
and DP_SELECT_DPBANK. Use the defined symbols instead of magic numbers. Change-Id: I19c86b183e57e42b96f76eed180c0492cd67bee1 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/7539 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23target/arm_adi_v5,jtag/drivers: rename ADIv5 only definesTomas Vanek4-17/+17
DP_SELECT_APSEL and DP_SELECT_APBANK is no more used in ADIv6. Change-Id: I4176574d46c6dc8eb3fe3aef6daab6e33492c050 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/7538 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23pld: harmonize refresh commandsDaniel Anselmi11-10/+112
add refresh command for lattice devices rename gowin reprogram to refresh rename virtex2 program to refresh Change-Id: I9da83a614b96da3e947ac4608b0a291b1d126914 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7839 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23jtagspi/pld: add support from gatemate driverDaniel Anselmi2-0/+72
Provide jtagspi with specific procedures to be able to use jtagspi for programming spi-flash devices on cologne chip gatemate devices. Change-Id: Ifa1c4ca6e215d7f49bd21620898991af213812e9 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7838 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23jtagspi/pld: add support from intel driverDaniel Anselmi2-2/+12
Provide jtagspi with information to use jtagspi for programming spi-flash devices on intel devices using a proxy bitstream. Change-Id: Ib947b8c0dd61e2c6fa8beeb30074606131b1480f Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7837 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23jtagspi/pld: add support from xilinx driverDaniel Anselmi2-0/+41
Provide jtagspi with information to use jtagspi for programming spi-flash devices on xilinx devices using a proxy bitstream. Change-Id: I68000d71de25118ed8a8603e544cff1dc69bd9ba Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7836 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23jtagspi/pld: add support from efinix driverDaniel Anselmi2-1/+13
Provide jtagspi with information to use jtagspi for programming spi-flash devices on efinix trion and titanium devices using a proxy bitstream. Change-Id: I4a851fcaafe832c35bd7b825d95a3d08e4d57a7b Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7826 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23jtagspi/pld: add support from lattice certus driverDaniel Anselmi4-0/+90
Provide jtagspi with specific procedures to be able to use jtagspi for programming spi-flash devices on lattice certus and certus po devices. Change-Id: I6a8ec16be78f86073a4ef5302f6241185b08e1c6 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7825 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23jtagspi/pld: add support from lattice ecp5 driverDaniel Anselmi5-1/+88
Provide jtagspi with specific procedures to be able to use jtagspi for programming spi-flash devices on lattice ecp5 devices. Change-Id: I4a4a60f21d7e8685a5b8320b9c6ebdc2693bbd21 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7824 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2023-09-23jtagspi/pld: add support from lattice ecp2/ecp3 driverDaniel Anselmi3-0/+120
Provide jtagspi with specific procedures to be able to use jtagspi for programming spi-flash devices on lattice ecp2 and ecp3 devices. Change-Id: I39028aba47a74a0479be16d52d318f4bff7f2ed4 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7823 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-09-23jtagspi/pld: add interface to get support from pld driversDaniel Anselmi5-47/+245
Jtagspi is using a proxy bitstream to "connect" JTAG to the SPI pins. This is not possible with all FPGA vendors/families. In this cases a dedicated procedure is needed to establish such a connection. This patch adds a jtagspi-mode for these cases. It also adds the needed interfaces to jtagspi and the pld-driver so the driver can select the mode and provide the necessary procedures. For the cases where a proxy bitstream is needed, the pld driver will select the mode and provide instruction code needed in this case. Change-Id: I9563f26739589157b39a3664a73d91152cd13f77 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7822 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
generated by cgit v1.1 at 2024-10-19 06:01:49 +0000