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2019-04-22Fixed typo in comment.new_bscan_approachGreg Savin1-1/+1
2019-04-22Fixed coding error where some fields in a queued JTAG scan would goGreg Savin1-26/+25
out of scope before the subsequent running of the JTAG queue. This just-so-happened not to be causing a visible problem, but was an accident waiting to happen.
2019-04-18Addressed review comments.Greg Savin3-6/+11
2019-04-18High bit of out_value was unpredictable. Added initializer toGreg Savin1-2/+2
fix it to zero. Theoretically that high bit gets dropped anyway, and never acted upon by hardware, but having it always zero makes verbose log comparisons easier.
2019-04-18Addressed review comments.Greg Savin8-63/+43
2019-04-11Fixed style issue caught by checkpatch.Greg Savin1-3/+3
2019-04-11Added some missing conditional compilation directives.Greg Savin1-0/+4
2019-04-09Fixed formatting issues flagged by checkpatch.pl.Greg Savin5-28/+23
2019-04-08Simplified BSCAN related scanning fields.Greg Savin2-24/+20
2019-04-08A couple fixes.Greg Savin2-7/+2
2019-04-08Added config files.Greg Savin3-0/+46
2019-04-05Moved some functions to riscv.c from the version-specific files.Greg Savin4-98/+114
2019-04-05Fixed wrong assignment of IR width (needed BSCAN IR width somewhereGreg Savin2-49/+7
instead of Tunneled JTAG IR width).
2019-04-05Fleshing out more.Greg Savin1-8/+100
2019-04-04Checking in for backup.Greg Savin6-0/+180
2019-04-03Support simultaneous resume using hasel (#364)Tim Newsome5-191/+300
* Remove unnecessary 0.11 code. Don't need need_strict_step anymore now that we have riscv_hit_watchpoint(). Don't need 32-bit warning in riscv011_resume() now that address is a target_address_t. Change-Id: I375c023a7ec9f62d80b037ddb64d14526ba0a3dc * WIP little refactor working towards hasel support. Change-Id: Ie0b8dfd9e5ae2e36613fa00e14c3cd32749141bf * More refactoring. Change-Id: I083387c2ecff78ddfea3ed5078444732d77b909b * More refactoring. Change-Id: Icea1308499492da51354f89e1529353e8385f3a1 * Starting to work towards actual hasel changes. Change-Id: If0df05ffa66cc58400b4855f9630a8b1bae3030e * Implement simultaneous resume using hasel. Change-Id: I97971d7564fdb159d2052393c8b82a2ffaa8833f * Add support back for targets that don't have hasel. Change-Id: I6d5439f0615d5d5333127d280e4f2642649a119a * Make hasel work with >32 harts. Change-Id: I3c55009d48bfc5dd62e3341df4e4bd21df2fe44f
2019-04-02More carefully ignore line numbers/time stamps. (#365)Tim Newsome1-3/+4
This helps when there are other kinds of text in the same file as the openocd log. Change-Id: I38da7d6685769a323930d6aab6cd83b7f27ea90f
2019-03-11Fix FESPI address parsing. (#355)Tim Newsome1-3/+1
Change-Id: Ib4bf9fb5a47121ab719395537cd97d848e177262
2019-03-05Set up halt groups for SMP groups. (#353)Tim Newsome3-164/+616
If the hardware supports it, when one hart in an SMP group halts all the other harts in that same SMP group will automatically, quickly, halt as well. Change-Id: Ida81f1309c180674e8c9d8060e3d2a4bbb910a6f
2019-03-01Merge pull request #354 from riscv/fix-openocd-texi-typoCarsten Gosvig1-1/+1
Fixed erroneous space that made CentOS 6 build fail
2019-03-01Fixed erroneous space that made CentOS 6 build failcgsfv1-1/+1
2019-02-14Merge pull request #351 from riscv/from_upstreamTim Newsome147-1242/+6456
From upstream
2019-02-14Fix cut and paste error in docs. (#352)Tim Newsome1-1/+1
Fixes #349. Change-Id: I5cfd5b28eef463cfa1faa3d1d766eb3e3f52904a
2019-02-11Style fix.Tim Newsome1-2/+1
I think there's a bug in checkpatch.pl, where depending on how many lines of context there are it either insists there's no space after the * (which I think is correct) or insists there's consistent spacing, apparently treating it as a multiplication operation. Moving the line seems to fix the context issue. Change-Id: I0d1822b44cd703fd405c75565bf599eb584b0244
2019-02-11Fix old cut and paste bug.Tim Newsome1-1/+1
Change-Id: Id06fb98ed3dd1b3987e4eafa0ec271c1cd77fef6
2019-02-08Fix build.Tim Newsome1-3/+2
Change-Id: Ifed3d69135c349898733943bedbd9e5c9daccf2c
2019-02-08Merge branch 'master' into from_upstreamTim Newsome147-1242/+6458
Conflicts: README contrib/loaders/flash/fespi/Makefile src/flash/nor/fespi.c src/flash/nor/spi.c Change-Id: I78a4e73685cc95daace95e9d16066a6fb51034fb
2019-02-07Rtos riscv (#350)Tim Newsome9-47/+127
* Implement riscv_get_thread_reg(). This is necessary because riscv_get_gdb_reg_list() now reads all registers, which ended up causing `-rtos riscv` to read all registers whenever one was requested (because the register cache is wiped every time we switch to a different hart). CustomRegisterTest went from 1329s to 106s. Change-Id: I8e9918b7a532d44bca927f67aae5ac34954a8d32 * Also implement riscv_set_reg(). Now all the `-rtos riscv` tests pass again, at regular speed. Change-Id: I55164224672d9dcc9eb4d1184b47258ff3c2cff1 * Better error messages. Change-Id: I4125f9a54750d9d0ee22c4fa84b9dd3f5af203f5 * Add target_get_gdb_reg_list_noread(). Being explicit about what's expected gets `-rtos riscv` back to `-rtos hwthread` time. Change-Id: I6e57390c2fe79b5e6799bfda980d89697e2e29f7 * Revert a change I made that has no effect. I don't understand exactly what all this test protects against, and I shouldn't change it unless I do. Change-Id: Ib329d4e34d65d2b38559b89b7afb3678f439ad2c
2019-02-07jlink: Use correct SWD buffer sizeMarc Schink1-1/+1
Currently, the SWD buffer size is adjusted corresponding to the free device memory. However, the adjusted size is not used. This fixes SWD operations on devices with small device memory, such as EFM32PG12 Pearl Gecko STK. It should also fix #184. Change-Id: I2ec5cf25c62f18bd9e99a2f4aa1aa8d85ed0821b Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/4878 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
2019-02-07drivers/bitbang: remove unused extern declaration of jtag_interfaceAntonio Borneo1-3/+0
After commit a6c4eb03455f ("swd: Remove DAP from parameter list") the global variable jtag_interface is not referenced in the driver. Remove the extern declaration. Change-Id: I72018a59c9cecaa52d9a49ec0d7816ac0e656314 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4874 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-02-07command: fix the mode for command "jtag configure"Antonio Borneo2-2/+2
Before commit 877cec20dca6e78f9f029f0f173879cda101a6c2 ("command: check command mode for native jim commands") all the jim commands were erroneously treated as they had mode COMMAND_ANY. The commit above fixes the code in order to check the mode and permit running the commands only if the mode is respected. Those jim commands that have incorrect mode were not detected nor fixes because the wrong mode was masked by the missing mode check. After the commit above, the wrong mode triggers error in several existing configuration scripts. A complete list of commands that now does not run anymore as CONFIG_ANY is reported in ticket 225, but most of them have the mode set correctly. At least two instances of command "jtag configure" have the wrong mode. Fix the mode to CONFIG_ANY for command "jtag configure" in files src/jtag/aice/aice_transport.c and src/jtag/tcl.c Change-Id: I3f96c5fd24d7d463712cbaf1295284fe0dc56b23 Ticket: https://sourceforge.net/p/openocd/tickets/225/ Reported-by: Bill Paul <wpaul@users.sourceforge.net> Fixes: 877cec20dca6 ("command: check command mode for native jim commands") Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4886 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2019-02-07doc: add documentation for "adapter usb location" commandOleksij Rempel1-0/+10
Change-Id: Ia3fbe0c3894b1b96464bbfda5d4101123827b761 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: http://openocd.zylin.com/4769 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07target/cortex_m: fix clang static analyzer warningTomas Vanek1-2/+7
Fix "Potential leak of memory pointed to by 'cortex_m'" and test for NULL return from calloc in cortex_m_target_create() Change-Id: I4d2bb5bccc57f0ed60696f3d588297a858b8ea60 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4881 Tested-by: jenkins Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-02-07target/hla_target: fix clang static analyzer warningTomas Vanek1-4/+6
Added an error msg in case of no memory Change-Id: I7a7d266ca4aa1e4a0ff02a2d1cc672a3cd2746c3 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4882 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-02-07at91samd: Add flash programming support for SAMC2?N* partsKevin Vermilion1-0/+4
Added id, name, flash size and RAM size for following parts to samc20_parts[]: SAMC20N18A SAMC20N17A And the following to samc21_parts[]: SAMC21N18A SAMC21N17A Change-Id: Ie8cf1c531a60bfaed6e814d436d232afb89dae3f Signed-off-by: Kevin Vermilion <kevin.vermilion@gmail.com> Reviewed-on: http://openocd.zylin.com/4880 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07target start_algorithm: Don't copy the IN mem_params fix uninitialised value.Jean-Christian de Rivaz5-1/+10
Fix the write only out params TODO on armv7m.c Fix conditional move depends on uninitialised value. It was detected while programming a LPC8Nxx with a FTDI adapter. valgrind --leak-check=full --show-leak-kinds=all --track-origins=yes [...] ==8696== Conditional jump or move depends on uninitialised value(s) ==8696== at 0x16E4D3: buf_set_u32 (binarybuffer.h:52) ==8696== by 0x16E4D3: ftdi_swd_queue_cmd (ftdi.c:1206) ==8696== by 0x18D76D: swd_queue_ap_write (adi_v5_swd.c:271) ==8696== by 0x18E33B: dap_queue_ap_write (arm_adi_v5.h:382) ==8696== by 0x18E33B: mem_ap_write (arm_adi_v5.c:420) ==8696== by 0x197CD9: target_write_buffer_default (target.c:2176) ==8696== by 0x2464B3: armv7m_start_algorithm (armv7m.c:383) ==8696== by 0x246AEB: armv7m_run_algorithm (armv7m.c:330) ==8696== by 0x19D846: target_run_algorithm (target.c:814) ==8696== by 0x1DF3A6: lpc2000_iap_call.isra.3 (lpc2000.c:818) ==8696== by 0x1E0CF6: lpc2000_erase (lpc2000.c:992) ==8696== by 0x185BDF: flash_driver_erase (core.c:44) ==8696== by 0x18650D: flash_iterate_address_range_inner (core.c:541) ==8696== by 0x18650D: flash_iterate_address_range (core.c:567) ==8696== by 0x18732F: flash_erase_address_range (core.c:584) ==8696== by 0x18732F: flash_write_unlock (core.c:928) ==8696== Uninitialised value was created by a heap allocation ==8696== at 0x4C2BBAF: malloc (vg_replace_malloc.c:299) ==8696== by 0x220EF9: init_mem_param (algorithm.c:30) ==8696== by 0x1DF247: lpc2000_iap_call.isra.3 (lpc2000.c:777) ==8696== by 0x1E0CF6: lpc2000_erase (lpc2000.c:992) ==8696== by 0x185BDF: flash_driver_erase (core.c:44) ==8696== by 0x18650D: flash_iterate_address_range_inner (core.c:541) ==8696== by 0x18650D: flash_iterate_address_range (core.c:567) ==8696== by 0x18732F: flash_erase_address_range (core.c:584) ==8696== by 0x18732F: flash_write_unlock (core.c:928) ==8696== by 0x18ACDF: handle_flash_write_image_command (tcl.c:457) ==8696== by 0x1B7D99: run_command (command.c:623) ==8696== by 0x1B7D99: script_command_run (command.c:208) ==8696== by 0x1B7FD9: command_unknown (command.c:1033) ==8696== by 0x2E2D37: JimInvokeCommand (jim.c:10364) ==8696== by 0x2E3865: Jim_EvalObj (jim.c:10814) ==8696== ==8696== Conditional jump or move depends on uninitialised value(s) ==8696== at 0x16E506: buf_set_u32 (binarybuffer.h:52) ==8696== by 0x16E506: ftdi_swd_queue_cmd (ftdi.c:1207) ==8696== by 0x18D76D: swd_queue_ap_write (adi_v5_swd.c:271) ==8696== by 0x18E33B: dap_queue_ap_write (arm_adi_v5.h:382) ==8696== by 0x18E33B: mem_ap_write (arm_adi_v5.c:420) ==8696== by 0x197CD9: target_write_buffer_default (target.c:2176) ==8696== by 0x2464B3: armv7m_start_algorithm (armv7m.c:383) ==8696== by 0x246AEB: armv7m_run_algorithm (armv7m.c:330) ==8696== by 0x19D846: target_run_algorithm (target.c:814) ==8696== by 0x1DF3A6: lpc2000_iap_call.isra.3 (lpc2000.c:818) ==8696== by 0x1E0CF6: lpc2000_erase (lpc2000.c:992) ==8696== by 0x185BDF: flash_driver_erase (core.c:44) ==8696== by 0x18650D: flash_iterate_address_range_inner (core.c:541) ==8696== by 0x18650D: flash_iterate_address_range (core.c:567) ==8696== by 0x18732F: flash_erase_address_range (core.c:584) ==8696== by 0x18732F: flash_write_unlock (core.c:928) ==8696== Uninitialised value was created by a heap allocation ==8696== at 0x4C2BBAF: malloc (vg_replace_malloc.c:299) ==8696== by 0x220EF9: init_mem_param (algorithm.c:30) ==8696== by 0x1DF247: lpc2000_iap_call.isra.3 (lpc2000.c:777) ==8696== by 0x1E0CF6: lpc2000_erase (lpc2000.c:992) ==8696== by 0x185BDF: flash_driver_erase (core.c:44) ==8696== by 0x18650D: flash_iterate_address_range_inner (core.c:541) ==8696== by 0x18650D: flash_iterate_address_range (core.c:567) ==8696== by 0x18732F: flash_erase_address_range (core.c:584) ==8696== by 0x18732F: flash_write_unlock (core.c:928) ==8696== by 0x18ACDF: handle_flash_write_image_command (tcl.c:457) ==8696== by 0x1B7D99: run_command (command.c:623) ==8696== by 0x1B7D99: script_command_run (command.c:208) ==8696== by 0x1B7FD9: command_unknown (command.c:1033) ==8696== by 0x2E2D37: JimInvokeCommand (jim.c:10364) ==8696== by 0x2E3865: Jim_EvalObj (jim.c:10814) Change-Id: I50f9a8c4516b686cf62ac3c76f47c53465e949da Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com> Reviewed-on: http://openocd.zylin.com/4811 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07flash/nor/stm32f1x: Ability to change user option bytes.Jan Vojtech2-3/+14
Adds ability to change the user data in STM32F1x/STM32F3x MCU's option byte. Since OpenOCD prints the content of user data in option byte registers, it is seems logical to also provide a way how to change this data. Change-Id: Ie6cb756b4f11b5c6dabd34bc89434a358eb758ff Signed-off-by: Jan Vojtech <honza.vojtech@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4663 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2019-02-07target algo: do not write reg_param if direction is PARAM_INTomas Vanek7-1/+19
Without this change xxx_start_algorithm() writes all register parameters no matter of their direction. It usually results in writing of uninitialized reg_params[].value - possibly reported by valgrind. While on it fix the wrong parameter direction in kinetis_disable_wdog_algo(). This bug did not have any impact because of unconditional write of reg_params. Change-Id: Ia9c6a7b37f77d5eb6e5f5463012dddd50471742b Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4813 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-07drivers/imx_gpio: fix polarity of srst and trstAntonio Borneo1-2/+2
The comment above the function is correct, but the code set the GPIO with wrong (reversed) polarity. Change-Id: Ifd09688150d3d2018af73521e0da3926bb1b7f84 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4847 Tested-by: jenkins Reviewed-by: Grzegorz Kostka <kostka.grzegorz@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07jtag: drivers: provide initial support for usb path filteringOleksij Rempel5-1/+185
With this patch drivers will be able to use usb path filtering. The path format is identical to the format provided by linux kernel: bus-port.port.... With this format it should be easier just to copy and paste path found in dmesg. Change-Id: I8bafa6fcb7a66ff68cc961a376f97f4f3dee35aa Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: http://openocd.zylin.com/4580 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-05flash/nor: flash driver and cfg for SAM E54, E53, E51 and D51Tomas Vanek6-3/+1119
The new Microchip (former Atmel) series powered by Cortex-M4 looks very similar to older M0+ powered SAM D2x at the first sight. Unfortunately the new series differs a lot in important details. NVMCTRL has different register addresses, moved important bits and even changed binary command set. An universal driver for all SAM D/E would be very complicated. That's why a new driver was derived. Tested on Microchip SAM E54 Xplained Pro kit (board cfg included). Adjusted for the restructured dap support. Checked by valgrind and clang static analyzer. Change-Id: I26c67047a552076f4b207b9b89285a53d69b4ca4 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4272 Tested-by: jenkins Reviewed-by: Andres Vahter <andres.vahter@gmail.com>
2019-02-04flash/nor/stm32f1x: use address instead of offset in stm32x_write_block()Tomas Vanek1-6/+4
stm32x_write_options() uses stm32x_write_block() at STM32_OB_RDP address. The change eliminates subtracting bank->base (and later adding it back). Change-Id: Icdd24afc7178b814be58e6033d4b93fdfb2d2a16 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4859 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
2019-02-04flash/nor/stm32f1x: fix minor error messagesTomas Vanek1-3/+5
Change-Id: I1e9e62979c4629c8ba1d5ae89ca7392259969eb6 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4858 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com>
2019-02-04cortex_m: fix stepping on FPB rev 1Tomas Vanek1-3/+10
Stepping in the maskisr auto mode sets breakpoint to step over interrupt service tasks. If the device has FPB rev 1, setting hard breakpoint is impossible on address over 0x1fffffff. Use soft type breakpoint for adresses over 0x1fffffff if FPB is rev 1. This may eventually fail if the code memory is not writeable, but there is nothing to do in such case. Change-Id: Ibdeeb506903a35d550b64f82c24c37a668de62b3 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4857 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-02-04flash/nor/at91samd: add samr34j18.Guillaume Revaillot1-0/+3
samr34/r35 combine SAML21 and SX1276 (lora transceiver). This one was found on xplaned pro evaluation kit. Ids for other r34/r35 chips are apparently not yet documented. Change-Id: I4054dd56ea53c9bae8d17abd5a3e4e65e1b9c8b1 Signed-off-by: Guillaume Revaillot <g.revaillot@gmail.com> Reviewed-on: http://openocd.zylin.com/4872 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-31Merge pull request #347 from riscv/hwthreadTim Newsome12-143/+787
`-rtos hwthread` support
2019-01-31Fix sending memory-map for 64-bit targets. (#348)Tim Newsome23-63/+84
See #202. I don't have a proper target with >32-bit flash and memory location, so I've been unable to properly test this. However, if I hack the fespi driver to not do anything and run the 64-bit spike tests I can see that the memory map OpenOCD sends now includes the full 64-bit address space: Debug: 3443 975 gdb_server.c:400 gdb_put_packet_inner(): sending packet '$l<memory-map> <memory type="ram" start="0x00000000" length="0x20000000"/> <memory type="ram" start="0x20000000" length="0xffffffffe0000000"/> </memory-map> It will also do this when the target is 32-bit, but that doesn't seem to have any ill effects on gdb. Change-Id: I0fd070ab7366188ff0259d90386f5e1f6985ce21
2019-01-30arm_adi_v5: rewrite dap_to_jtag and dap_to_swdAntonio Borneo5-119/+80
The functions dap_to_jtag() and dap_to_swd() have been introduced by 3ef9beb52cd0 ("ADIv5 DAP ops switching to JTAG or SWD modes") in arm_adi_v5.c by using the JTAG queue only. Later, in 6f8b8593d63b ("ADIv5 transport support moves to separate files") the functions has been moved in adi_v5_swd.c and adi_v5_jtag.c but keeping the dependency from JTAG queue. The functions does not work if the current transport is not JTAG. Move back the functions in arm_adi_v5.c, replace the input parameter "target" with "dap", use the transport to detect if the JTAG queue is present, in case of SWD transport use the proper method, for other transports report error. Reuse the ADI v5 sequences already present in jtag/swd.h. Also, OpenOCD does not support switching to another transport after the initial selection, so do not change DAP's ops vector. Change-Id: Ib681fbaa60cb342f732bc831eb92de25afa4e4db Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/4852 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-30aarch64: support for aarch32 ARM_MODE_SYSMatthias Welwarsky3-0/+12
Treat ARM_MODE_SYS like all other Aarch32 processor modes, except for the special case of missing SPSR. Change-Id: I60b21703659b264f552884cdc0f85fd45f7836de Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4494 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-01-27target: do not allow 'target create' after initTomas Vanek1-2/+1
A target created after init lacks target_init_one() call and is not added to gdb targets. Steps to reproduce: - start OpenOCD with a dap target - connect by telnet target create ap0.mem mem_ap -dap $_CHIPNAME.dap -ap-num 0 reset Segmentation fault is rised because target->check_reset is NULL. Change-Id: I2a62f3b450e4db3005c7041a22fb8f952e68c3b6 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/4842 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
generated by cgit v1.1 at 2024-10-12 11:21:08 +0000