aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
2017-04-24Fix flash writing on stm32l0Armin van der Togt2-30/+18
2017-04-24flash/nor/at91samd: fix chip erase of a secured deviceTomas Vanek1-4/+10
2017-04-24jtag/drivers cmsis-dap: do not limit speed so strictlyTomas Vanek1-5/+3
2017-04-24Add support for the ATMEL SAM G55 Xplained Pro board and CPU.Jerome Lambourg2-0/+81
2017-04-23help/log.c: better error handling for "log_output"Girts1-3/+9
2017-04-23helper/options.c: fail if unexpected cmdline arguments are presentGirts1-0/+9
2017-04-23help/options.c: add error handling for -d argGirts1-2/+5
2017-04-23board: introduce base config for TI BeagleBone family boardsMatthias Welwarsky3-2/+14
2017-04-23nrf51: Add new HWID 0x008FDamyan Mitev1-0/+7
2017-04-23tools/scripts/checkpatch.pl: fix unescaped braceChengyu Zheng1-1/+1
2017-04-23added interface config file for In-Circuit's ICprog OpenOCD JTAG adapterMatthias Bock1-0/+14
2017-04-23jtag/drivers cmsis-dap: fix speed setting on Atmel EDBGTomas Vanek1-1/+7
2017-04-23flash Kinetis: reduce a flash write message severity to infoJoakim Nohlgård1-1/+1
2017-04-23target: Fix memory leakMarc Schink2-5/+20
2017-04-23stlink: increase trace buffer size to maximum allowed on st-link v2 firmwareAustin Morton1-1/+1
2017-04-10Properly consider 'reset halt' and do halt or resume as neededMegan Wachs1-3/+30
2017-04-10fespi: Reset may have occurred. Need to set TXWM again. There are probably mo...Megan Wachs1-12/+24
2017-04-10riscv: Implement the assert/deassert reset functions for v13Megan Wachs2-2/+11
2017-04-04Merge pull request #28 from sifive/readmem_autoexecMegan Wachs1-11/+27
2017-04-04riscv: move value read to after autoexec is cleared.Megan Wachs1-8/+15
2017-04-04riscv: Correct the autoexec in read_memMegan Wachs1-4/+13
2017-04-02aarch64: add some documentationMatthias Welwarsky1-4/+33
2017-04-02aarch64: clear CTI halt event early at debug entryMatthias Welwarsky1-0/+2
2017-03-30Merge pull request #23 from sifive/w1-to-clear-cmderrPalmer Dabbelt1-9/+5
2017-03-30riscv: Use write-1-to-clear for CMDERR, not write 0 to clear.Megan Wachs1-9/+5
2017-03-29nrf51: Remove pointer castAndreas Fritiofson1-3/+4
2017-03-23Revert "(WIP) Force algorithms to 64 bit"Palmer Dabbelt1-2/+2
2017-03-23(WIP) Force algorithms to 64 bitPalmer Dabbelt1-2/+2
2017-03-23some devicePalmer Dabbelt1-0/+1
2017-03-23Don't set abstractauto at the startPalmer Dabbelt1-1/+2
2017-03-22Merge pull request #21 from sifive/read_memory_retryPalmer Dabbelt1-66/+75
2017-03-22Merge remote-tracking branch 'origin/riscv' into read_memory_retryMegan Wachs0-0/+0
2017-03-22riscv: Retry failed memory readsMegan Wachs1-65/+75
2017-03-22Turn off autoexec after read_memory()Palmer Dabbelt1-0/+1
2017-03-21riscv: add missing variable declaration.Megan Wachs1-0/+1
2017-03-21Clear autoexec correctlyPalmer Dabbelt1-1/+1
2017-03-21Wrong autoexecPalmer Dabbelt1-2/+2
2017-03-21BuildsPalmer Dabbelt2-425/+533
2017-03-21Merge pull request #20 from sifive/delay_after_autoexecMegan Wachs1-3/+10
2017-03-15riscv-v13: wait for idle in read_memoryMegan Wachs1-3/+10
2017-03-06arm_dpm: fix dpm setupGirts Folkmanis1-1/+1
2017-02-27Remove more cruft.Tim Newsome1-35/+1
2017-02-27Merge pull request #18 from sifive/halt_correctlyTim Newsome1-2/+4
2017-02-27riscv: Ensure that hart is halted before attempting to examine it.Megan Wachs1-2/+4
2017-02-25Remove cruft.Tim Newsome1-47/+11
2017-02-25Use DCSR constants from the debug spec.Tim Newsome1-170/+21
2017-02-25Update bits to latest spec.Tim Newsome2-587/+591
2017-02-24tcl: add Hi6220 target and LeMaker HiKey board configMatthias Welwarsky2-0/+82
2017-02-24armv8_dpm: fix exception handlingMatthias Welwarsky1-0/+2
2017-02-24armv8_dpm: retrieve only necessary registers on haltMatthias Welwarsky1-3/+11
generated by cgit v1.1 at 2024-11-16 05:27:03 +0000