2 files changed, 1 insertions, 7 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 2ed1dd7..191a17e 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -101,12 +101,6 @@ typedef enum {
 	DMI_STATUS_BUSY = DTM_DMI_OP_BUSY
 } dmi_status_t;
 
-typedef enum slot {
-	SLOT0,
-	SLOT1,
-	SLOT_LAST,
-} slot_t;
-
 /*** Debug Bus registers. ***/
 
 /* TODO: CMDERR_* defines can removed */
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 2454d54..dbb353b 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -6960,7 +6960,7 @@ static void hide_csrs(const struct target *target)
 			struct reg * const reg = get_reg_cache_entry(target, regno);
 			const unsigned int csr_number = regno - GDB_REGNO_CSR0;
 			if (!reg->exist) {
-				LOG_TARGET_WARNING(target,
+				LOG_TARGET_DEBUG(target,
 						"Not hiding CSR %d: register does not exist.",
 						csr_number);
 				continue;