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authorZale Yu <cyyu@nuvoton.com>2022-11-04 23:07:29 +0800
committerAntonio Borneo <borneo.antonio@gmail.com>2023-01-15 15:03:35 +0000
commit21b14028ad7565f4916ae05a6c28b465eceb9150 (patch)
treed1bb898da650bfc2742c269457bbf3f0ab4f9180 /tcl
parentd1b0cb2b774c1033a6ca8e531781df82baac40f7 (diff)
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tcl: add a configuration file for Nuvoton M541 & NUC442/472 series
This patch is picked from the tcl part of OpenOCD-Nuvoton's commit ("flash: supported Nuvoton M4 series. jtag: Used HW reset instead of auto reset. tcl: added a configuration file for Nuvoton M4 series.") [1] to support the communication with Nuvoton's Cortex-M4 chips: M541 & NUC442/472 series. This patch has been tested with Nuvoton's NuTiny-SDK-NUC472 development board [2]. The code comes from the commit basically. Jian-Hong Pan tweaked for the compatibility with current OpenOCD. So, leave the author as Zale Yu. [1]: https://github.com/OpenNuvoton/OpenOCD-Nuvoton/commit/c2d5b8bfc705 [2]: https://www.nuvoton.com/export/resource-files/UM_NuTiny-SDK- NUC472_EN_Rev1.02.pdf Signed-off-by: Zale Yu <cyyu@nuvoton.com> Signed-off-by: Jian-Hong Pan <chienhung.pan@gmail.com> Change-Id: I27ac58dd1c98a76e791a4f1117c31060cf5522e8 Reviewed-on: https://review.openocd.org/c/openocd/+/7330 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'tcl')
-rw-r--r--tcl/target/numicro_m4.cfg62
1 files changed, 62 insertions, 0 deletions
diff --git a/tcl/target/numicro_m4.cfg b/tcl/target/numicro_m4.cfg
new file mode 100644
index 0000000..1302515
--- /dev/null
+++ b/tcl/target/numicro_m4.cfg
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# script for Nuvoton MuMicro Cortex-M4 Series
+
+source [find target/swj-dp.tcl]
+
+# Set Chipname
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME NuMicro
+}
+
+# SWD DP-ID Nuvoton NuMicro Cortex-M4 has SWD Transport only.
+if { [info exists CPUDAPID] } {
+ set _CPUDAPID $CPUDAPID
+} else {
+ set _CPUDAPID 0x2BA01477
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 16kB
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x4000
+}
+
+
+# Debug Adapter Target Settings
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUDAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+# flash bank <name> numicro <base> <size(autodetect,set to 0)> 0 0 <target#>
+#set _FLASHNAME $_CHIPNAME.flash
+#flash bank $_FLASHNAME numicro 0 $_FLASHSIZE 0 0 $_TARGETNAME
+# flash size will be probed
+set _FLASHNAME $_CHIPNAME.flash_aprom
+flash bank $_FLASHNAME numicro 0x00000000 0 0 0 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash_data
+flash bank $_FLASHNAME numicro 0x0001F000 0 0 0 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash_ldrom
+flash bank $_FLASHNAME numicro 0x00100000 0 0 0 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash_config
+flash bank $_FLASHNAME numicro 0x00300000 0 0 0 $_TARGETNAME
+
+# set default SWCLK frequency
+adapter speed 1000
+
+# set default srst setting "none"
+reset_config none
+
+# HLA doesn't have cortex_m commands
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}