Merge branch 'master' into from_upstream

Conflicts:
	src/flash/nor/fespi.c
	src/jtag/drivers/ftdi.c
	src/rtos/FreeRTOS.c
	src/rtos/hwthread.c
	src/rtos/rtos.c
	src/rtos/rtos.h
	src/rtos/rtos_ecos_stackings.c
	src/rtos/rtos_embkernel_stackings.c
	src/rtos/rtos_standard_stackings.c
	src/rtos/rtos_standard_stackings.h
	src/rtos/rtos_ucos_iii_stackings.c
	src/server/gdb_server.c
	src/server/server.c
	src/target/riscv/riscv-013.c
	src/target/target.c
	src/target/target.h

Change-Id: If0924a3e799260c33fae5feb85975b1273b45a0f

23 files changed, 154 insertions, 55 deletions

diff --git a/tcl/board/altera_sockit.cfg b/tcl/board/altera_sockit.cfg
index b7c7993..4d10aef 100644
--- a/tcl/board/altera_sockit.cfg
+++ b/tcl/board/altera_sockit.cfg
@@ -12,7 +12,7 @@ adapter driver usb_blaster
 source [find target/altera_fpgasoc.cfg]
 
 # If the USB Blaster II were supported, these settings would be needed
-#usb_blaster_vid_pid 0x09fb 0x6810
-#usb_blaster_device_desc "USB-Blaster II"
+#usb_blaster vid_pid 0x09fb 0x6810
+#usb_blaster device_desc "USB-Blaster II"
 
 adapter speed 100
diff --git a/tcl/board/digilent_analog_discovery.cfg b/tcl/board/digilent_analog_discovery.cfg
index 954e540..64cdacf 100644
--- a/tcl/board/digilent_analog_discovery.cfg
+++ b/tcl/board/digilent_analog_discovery.cfg
@@ -8,10 +8,10 @@
 #
 
 adapter driver ftdi
-ftdi_device_desc "Digilent USB Device"
-ftdi_vid_pid 0x0403 0x6014
+ftdi device_desc "Digilent USB Device"
+ftdi vid_pid 0x0403 0x6014
 
-ftdi_layout_init 0x8008 0x800b
+ftdi layout_init 0x8008 0x800b
 
 adapter speed 25000
 
diff --git a/tcl/board/digilent_nexys_video.cfg b/tcl/board/digilent_nexys_video.cfg
index f171e24..b60ec91 100644
--- a/tcl/board/digilent_nexys_video.cfg
+++ b/tcl/board/digilent_nexys_video.cfg
@@ -6,19 +6,19 @@
 adapter driver ftdi
 adapter speed 30000
 
-ftdi_device_desc "Digilent USB Device"
-ftdi_vid_pid 0x0403 0x6010
+ftdi device_desc "Digilent USB Device"
+ftdi vid_pid 0x0403 0x6010
 
 # channel 0 is dedicated for Digilent's DPTI Interface
 # channel 1 is used for JTAG
-ftdi_channel 1
+ftdi channel 1
 
 # just TCK TDI TDO TMS, no reset
-ftdi_layout_init 0x0088 0x008b
+ftdi layout_init 0x0088 0x008b
 reset_config none
 
 # Enable sampling on falling edge for high JTAG speeds.
-ftdi_tdo_sample_edge falling
+ftdi tdo_sample_edge falling
 
 transport select jtag
 
diff --git a/tcl/board/dp_busblaster_v3.cfg b/tcl/board/dp_busblaster_v3.cfg
index a9974d9..b94b43a 100644
--- a/tcl/board/dp_busblaster_v3.cfg
+++ b/tcl/board/dp_busblaster_v3.cfg
@@ -8,6 +8,6 @@
 #
 
 source [find interface/ftdi/dp_busblaster.cfg]
-ftdi_channel 1
+ftdi channel 1
 
 jtag newtap xc2c32a tap -expected-id 0x06e1c093 -irlen 8
diff --git a/tcl/board/dp_busblaster_v4.cfg b/tcl/board/dp_busblaster_v4.cfg
index 7b3bee8..2c2f0e9 100644
--- a/tcl/board/dp_busblaster_v4.cfg
+++ b/tcl/board/dp_busblaster_v4.cfg
@@ -14,6 +14,6 @@
 #
 
 source [find interface/ftdi/dp_busblaster.cfg]
-ftdi_channel 1
+ftdi channel 1
 
 jtag newtap xc2c64a tap -expected-id 0x06e5c093 -irlen 8
diff --git a/tcl/board/gumstix-aerocore.cfg b/tcl/board/gumstix-aerocore.cfg
index f0103ed..565df4c 100644
--- a/tcl/board/gumstix-aerocore.cfg
+++ b/tcl/board/gumstix-aerocore.cfg
@@ -1,10 +1,10 @@
 # JTAG for the STM32F4x chip used on the Gumstix AeroCore is available on
 # the first interface of a Quad FTDI chip.  nTRST is bit 4.
 adapter driver ftdi
-ftdi_vid_pid 0x0403 0x6011
+ftdi vid_pid 0x0403 0x6011
 
-ftdi_layout_init 0x0000 0x001b
-ftdi_layout_signal nTRST -data 0x0010
+ftdi layout_init 0x0000 0x001b
+ftdi layout_signal nTRST -data 0x0010
 
 source [find target/stm32f4x.cfg]
 reset_config trst_only
diff --git a/tcl/board/kasli.cfg b/tcl/board/kasli.cfg
index d492249..7cfdcf2 100644
--- a/tcl/board/kasli.cfg
+++ b/tcl/board/kasli.cfg
@@ -1,8 +1,8 @@
 adapter driver ftdi
-ftdi_device_desc "Quad RS232-HS"
-ftdi_vid_pid 0x0403 0x6011
-ftdi_channel 0
-ftdi_layout_init 0x0008 0x000b
+ftdi device_desc "Quad RS232-HS"
+ftdi vid_pid 0x0403 0x6011
+ftdi channel 0
+ftdi layout_init 0x0008 0x000b
 # adapter usb location 1:8
 
 reset_config none
diff --git a/tcl/board/kindle2.cfg b/tcl/board/kindle2.cfg
index a39f15c..71dca74 100644
--- a/tcl/board/kindle2.cfg
+++ b/tcl/board/kindle2.cfg
@@ -37,7 +37,7 @@ jtag_ntrst_delay 30
 arm11 memwrite burst disable
 
 adapter speed 1000
-ftdi_tdo_sample_edge falling
+ftdi tdo_sample_edge falling
 
 proc kindle2_init {} {
 	imx3x_reset
diff --git a/tcl/board/lambdaconcept_ecpix-5.cfg b/tcl/board/lambdaconcept_ecpix-5.cfg
new file mode 100644
index 0000000..19b9c1c
--- /dev/null
+++ b/tcl/board/lambdaconcept_ecpix-5.cfg
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# LambdaConcept ECPIX-5
+# http://docs.lambdaconcept.com/ecpix-5/
+# Currently there are following board variants:
+# ECPIX-5 45F - LFE5UM5G-45F
+# ECPIX-5 85F - LFE5UM5G-85F
+#
+# This boards have two JTAG interfaces:
+# - CN4, micro USB port connected to FT2232HQ chip:
+#        ADBUS0 TCK
+#        ADBUS1 TDI
+#        ADBUS2 TDO
+#        ADBUS3 TMS
+#        BDBUS0 UART_TXD
+#        BDBUS1 UART_RXD
+#   This interface should be used with following config:
+#        interface/ftdi/lambdaconcept_ecpix-5.cfg
+# - CN3, 6 pin connector
+# See schematics for more details:
+# http://docs.lambdaconcept.com/ecpix-5/_static/resources/SCH_ECPIX-5_R02.PDF
+#
+# No reset lines are implemented. So it is not possible to remote reset the FPGA
+# by using any of this interfaces
+
+source [find interface/ftdi/lambdaconcept_ecpix-5.cfg]
+source [find fpga/lattice_ecp5.cfg]
diff --git a/tcl/board/microchip_sama5d27_som1_kit1.cfg b/tcl/board/microchip_sama5d27_som1_kit1.cfg
new file mode 100644
index 0000000..8e92040
--- /dev/null
+++ b/tcl/board/microchip_sama5d27_som1_kit1.cfg
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Microchip SAMA5D27-SOM1-EK1
+# https://www.microchip.com/DevelopmentTools/ProductDetails/PartNO/ATSAMA5D27-SOM1-EK1
+# This board provide two jtag interfaces:
+# J11 - 10 pin interface
+# J10 - USB interface connected to the J-Link-OB.
+#       This functionality is implemented with an ATSAM3U4C microcontroller and
+#       provides JTAG functions and a bridge USB/Serial debug port (CDC).
+#
+# Jumper J7 disables the J-Link-OB-ATSAM3U4C JTAG functionality.
+# - Jumper J7 not installed: J-Link-OB-ATSAM3U4C is enabled and fully functional.
+# - Jumper J7 installed: J-Link-OB-ATSAM3U4C is disabled and an external JTAG
+#   controller can be used through the 10-pin JTAG port J11.
+
+source [find interface/jlink.cfg]
+reset_config srst_only
+
+source [find target/at91sama5d2.cfg]
diff --git a/tcl/board/nds32_corvettef1.cfg b/tcl/board/nds32_corvettef1.cfg
index cec1723..7300ce0 100644
--- a/tcl/board/nds32_corvettef1.cfg
+++ b/tcl/board/nds32_corvettef1.cfg
@@ -7,12 +7,12 @@
 adapter speed     10000
 
 adapter driver ftdi
-ftdi_device_desc "Dual RS232-HS"
-ftdi_vid_pid 0x0403 0x6010
+ftdi device_desc "Dual RS232-HS"
+ftdi vid_pid 0x0403 0x6010
 
-ftdi_layout_init 0x0c08 0x0f1b
-ftdi_layout_signal nTRST -data 0x0100 -noe 0x0400
-ftdi_layout_signal nSRST -data 0x0200 -noe 0x0800
+ftdi layout_init 0x0c08 0x0f1b
+ftdi layout_signal nTRST -data 0x0100 -noe 0x0400
+ftdi layout_signal nSRST -data 0x0200 -noe 0x0800
 reset_config srst_only
 
 source [find target/nds32v5.cfg]
diff --git a/tcl/board/novena-internal-fpga.cfg b/tcl/board/novena-internal-fpga.cfg
index 0e9ff5b..7805862 100644
--- a/tcl/board/novena-internal-fpga.cfg
+++ b/tcl/board/novena-internal-fpga.cfg
@@ -19,6 +19,6 @@ adapter driver sysfsgpio
 transport select jtag
 
 # TCK TMS TDI TDO
-sysfsgpio_jtag_nums 136 139 137 138
+sysfsgpio jtag_nums 136 139 137 138
 
 source [find cpld/xilinx-xc6s.cfg]
diff --git a/tcl/board/numato_mimas_a7.cfg b/tcl/board/numato_mimas_a7.cfg
index d4012ba..12df891 100644
--- a/tcl/board/numato_mimas_a7.cfg
+++ b/tcl/board/numato_mimas_a7.cfg
@@ -8,13 +8,13 @@
 #       Therefore, prefer external power supply.
 
 adapter driver ftdi
-ftdi_device_desc "Mimas Artix 7 FPGA Module"
-ftdi_vid_pid 0x2a19 0x1009
+ftdi device_desc "Mimas Artix 7 FPGA Module"
+ftdi vid_pid 0x2a19 0x1009
 
 # channel 0 is for custom purpose by users (like uart, fifo etc)
 # channel 1 is reserved for JTAG (by-default) or SPI (possible via changing solder jumpers)
-ftdi_channel 1
-ftdi_tdo_sample_edge falling
+ftdi channel 1
+ftdi tdo_sample_edge falling
 
 
 # FTDI Pin Layout
@@ -28,7 +28,7 @@ ftdi_tdo_sample_edge falling
 # OE_N is JTAG buffer output enable signal (active-low)
 # PROG_B is not used, so left as input to FTDI.
 #
-ftdi_layout_init 0x0008 0x004b
+ftdi layout_init 0x0008 0x004b
 reset_config none
 adapter speed 30000
 
diff --git a/tcl/board/quark_d2000_refboard.cfg b/tcl/board/quark_d2000_refboard.cfg
index 8b8314a..a89895d 100644
--- a/tcl/board/quark_d2000_refboard.cfg
+++ b/tcl/board/quark_d2000_refboard.cfg
@@ -2,11 +2,11 @@
 
 # the board has an onboard FTDI FT232H chip
 adapter driver ftdi
-ftdi_vid_pid 0x0403 0x6014
-ftdi_channel 0
+ftdi vid_pid 0x0403 0x6014
+ftdi channel 0
 
-ftdi_layout_init 0x0000 0x030b
-ftdi_layout_signal nTRST -data 0x0100 -noe 0x0100
+ftdi layout_init 0x0000 0x030b
+ftdi layout_signal nTRST -data 0x0100 -noe 0x0100
 
 source [find target/quark_d20xx.cfg]
 
diff --git a/tcl/board/radiona_ulx3s.cfg b/tcl/board/radiona_ulx3s.cfg
new file mode 100644
index 0000000..eb9b027
--- /dev/null
+++ b/tcl/board/radiona_ulx3s.cfg
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# Radiona ULX3S
+# https://radiona.org/ulx3s/
+# Currently there are following board variants:
+# CS-ULX3S-01 - LFE5U 12F
+# CS-ULX3S-02 - LFE5U 45F
+# CS-ULX3S-03 - LFE5U 85F
+#
+# two JTAG interfaces:
+# - US1, micro USB port connected to FT231XQ
+#   This interface should be used with following config:
+#        interface/ft232r/radiona_ulx3s.cfg
+# - J4, 6 pin connector
+#
+# Both of this interfaces share the JTAG lines (TDI, TMS, TCK, TDO) between
+# Lattice ECP5 FPGA chip and ESP32 WiFi controller.
+# Note: TRST_N of the ESP32 is pulled up by default and can be pulled down over
+# J3 interface.
+# See schematics for more information:
+# https://github.com/emard/ulx3s/blob/master/doc/schematics_v308.pdf
+# https://github.com/emard/ulx3s/blob/master/doc/schematics_v314.pdf
+# https://github.com/emard/ulx3s/blob/master/doc/schematics_v315.pdf
+# https://github.com/emard/ulx3s/blob/master/doc/schematics_v316.pdf
+
+source [find interface/ft232r/radiona_ulx3s.cfg]
+source [find fpga/lattice_ecp5.cfg]
diff --git a/tcl/board/reflexces_achilles_i-dev_kit_arria10.cfg b/tcl/board/reflexces_achilles_i-dev_kit_arria10.cfg
index a6e8065..c9f8d36 100644
--- a/tcl/board/reflexces_achilles_i-dev_kit_arria10.cfg
+++ b/tcl/board/reflexces_achilles_i-dev_kit_arria10.cfg
@@ -6,7 +6,7 @@ if { [info exists USE_EXTERNAL_DEBUGGER] } {
 	echo "Using external debugger"
 } else {
 	source [find interface/altera-usb-blaster2.cfg]
-	usb_blaster_device_desc "Arria10 IDK"
+	usb_blaster device_desc "Arria10 IDK"
 }
 
 source [find fpga/altera-10m50.cfg]
diff --git a/tcl/board/rpi3.cfg b/tcl/board/rpi3.cfg
new file mode 100644
index 0000000..fd93a9d
--- /dev/null
+++ b/tcl/board/rpi3.cfg
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# This is the Raspberry Pi 3 board with BCM2837 chip
+# https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2837/README.md
+#
+# Enable JTAG GPIO on Raspberry Pi boards
+# https://www.raspberrypi.org/documentation/configuration/config-txt/gpio.md
+
+source [find target/bcm2837.cfg]
+transport select jtag
+
+# Raspberry Pi boards only expose Test Reset (TRST) pin, no System Reset (SRST)
+reset_config trst_only
diff --git a/tcl/board/rpi4b.cfg b/tcl/board/rpi4b.cfg
new file mode 100644
index 0000000..5b046af
--- /dev/null
+++ b/tcl/board/rpi4b.cfg
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# This is the Raspberry Pi 4 model B board with BCM2711 chip
+# https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2711/README.md
+#
+# Enable JTAG GPIO on Raspberry Pi boards
+# https://www.raspberrypi.org/documentation/configuration/config-txt/gpio.md
+
+source [find target/bcm2711.cfg]
+transport select jtag
+
+# Raspberry Pi boards only expose Test Reset (TRST) pin, no System Reset (SRST)
+reset_config trst_only
diff --git a/tcl/board/sayma_amc.cfg b/tcl/board/sayma_amc.cfg
index 64c0854..0bd76ba 100644
--- a/tcl/board/sayma_amc.cfg
+++ b/tcl/board/sayma_amc.cfg
@@ -11,19 +11,19 @@
 # which features an Artix 7 FPGA.
 
 adapter driver ftdi
-ftdi_device_desc "Quad RS232-HS"
-ftdi_vid_pid 0x0403 0x6011
-ftdi_channel 0
+ftdi device_desc "Quad RS232-HS"
+ftdi vid_pid 0x0403 0x6011
+ftdi channel 0
 # Use this to distinguish multiple boards by topology
 #adapter usb location 5:1
 # sampling on falling edge generally seems to work and accelerates things but
 # is not fully tested
-#ftdi_tdo_sample_edge falling
+#ftdi tdo_sample_edge falling
 # EN_USB_JTAG on ADBUS7: out, high
 # USB_nTRST on ADBUS4: out, high, but R46 is DNP
-ftdi_layout_init 0x0098 0x008b
-#ftdi_layout_signal EN_USB -data 0x0080
-#ftdi_layout_signal nTRST -data 0x0010
+ftdi layout_init 0x0098 0x008b
+#ftdi layout_signal EN_USB -data 0x0080
+#ftdi layout_signal nTRST -data 0x0010
 reset_config none
 
 adapter speed 5000
diff --git a/tcl/board/sifive-e31arty.cfg b/tcl/board/sifive-e31arty.cfg
index b7a255e..8e701f1 100644
--- a/tcl/board/sifive-e31arty.cfg
+++ b/tcl/board/sifive-e31arty.cfg
@@ -14,8 +14,8 @@ $_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-
 flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000
 init
 if {[ info exists pulse_srst]} {
-  ftdi_set_signal nSRST 0
-  ftdi_set_signal nSRST z
+  ftdi set_signal nSRST 0
+  ftdi set_signal nSRST z
 }
 halt
 flash protect 0 64 last off
diff --git a/tcl/board/sifive-e51arty.cfg b/tcl/board/sifive-e51arty.cfg
index 20ad575..a543987 100644
--- a/tcl/board/sifive-e51arty.cfg
+++ b/tcl/board/sifive-e51arty.cfg
@@ -14,8 +14,8 @@ $_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-
 flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000
 init
 if {[ info exists pulse_srst]} {
-  ftdi_set_signal nSRST 0
-  ftdi_set_signal nSRST z
+  ftdi set_signal nSRST 0
+  ftdi set_signal nSRST z
 }
 halt
 flash protect 0 64 last off
diff --git a/tcl/board/sifive-hifive1.cfg b/tcl/board/sifive-hifive1.cfg
index 196f540..c47485b 100644
--- a/tcl/board/sifive-hifive1.cfg
+++ b/tcl/board/sifive-hifive1.cfg
@@ -1,15 +1,15 @@
 adapter speed     10000
 
 adapter driver ftdi
-ftdi_device_desc "Dual RS232-HS"
-ftdi_vid_pid 0x0403 0x6010
+ftdi device_desc "Dual RS232-HS"
+ftdi vid_pid 0x0403 0x6010
 
-ftdi_layout_init 0x0008 0x001b
-ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
+ftdi layout_init 0x0008 0x001b
+ftdi layout_signal nSRST -oe 0x0020 -data 0x0020
 
 #Reset Stretcher logic on FE310 is ~1 second long
 #This doesn't apply if you use
-# ftdi_set_signal, but still good to document
+# ftdi set_signal, but still good to document
 #adapter srst delay 1500
 
 set _CHIPNAME riscv
@@ -23,8 +23,8 @@ flash bank onboard_spi_flash fespi 0x20000000 0 0 0 $_TARGETNAME
 init
 #reset -- This type of reset is not implemented yet
 if {[ info exists pulse_srst]} {
-  ftdi_set_signal nSRST 0
-  ftdi_set_signal nSRST z
+  ftdi set_signal nSRST 0
+  ftdi set_signal nSRST z
   #Wait for the reset stretcher
   #It will work without this, but
   #will incur lots of delays for later commands.
diff --git a/tcl/board/ti_tmdx570ls20susb.cfg b/tcl/board/ti_tmdx570ls20susb.cfg
index 87cab26..e71136c 100644
--- a/tcl/board/ti_tmdx570ls20susb.cfg
+++ b/tcl/board/ti_tmdx570ls20susb.cfg
@@ -12,5 +12,5 @@ reset_config trst_only
 
 # xds100v2 config says add this to the end
 init
-ftdi_set_signal PWR_RST 1
+ftdi set_signal PWR_RST 1
 jtag arp_init