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| author | Tim Newsome <tim@sifive.com> | 2020-04-13 12:53:26 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-04-13 12:53:26 -0700 |
| commit | 2e9aad8914f413c45dbdc884a9ad831ef6000659 (patch) | |
| tree | 9b34af5a721b751a93da965f740fb4405258ce12 /src | |
| parent | 464407cfd21b62f1b5aaf975b0e3bdb22afd417f (diff) | |
| download | riscv-openocd-2e9aad8914f413c45dbdc884a9ad831ef6000659.zip riscv-openocd-2e9aad8914f413c45dbdc884a9ad831ef6000659.tar.gz riscv-openocd-2e9aad8914f413c45dbdc884a9ad831ef6000659.tar.bz2 | |
Don't propagate failure to read satp in riscv_mmu() (#466)
If we return failure, then the caller will think something's wrong. But
it could very well be that the hardware doesn't have SATP, in which case
we should just report that the MMU is disabled.
This fixes a bug where flashing wasn't using the target algorithm
because allocating a work area failed.
Change-Id: I16e8e660036d3f8584c0b17e842c4ec8961a8410
Diffstat (limited to 'src')
| -rw-r--r-- | src/target/riscv/riscv.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 4650a09..43c45d6 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -1382,10 +1382,11 @@ static int riscv_mmu(struct target *target, int *enabled) riscv_set_current_hartid(target, target->rtos->current_thread - 1); riscv_reg_t value; - int result = riscv_get_register(target, &value, GDB_REGNO_SATP); - if (result != ERROR_OK) { + if (riscv_get_register(target, &value, GDB_REGNO_SATP) != ERROR_OK) { LOG_DEBUG("Couldn't read SATP."); - return result; + /* If we can't read SATP, then there must not be an MMU. */ + *enabled = 0; + return ERROR_OK; } if (get_field(value, RISCV_SATP_MODE(riscv_xlen(target))) == SATP_MODE_OFF) { |