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| author | Paul Fertser <fercerpav@gmail.com> | 2015-08-27 14:03:16 +0300 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2016-01-15 10:37:27 +0000 |
| commit | ae8cdc139e12a851107e8f882c5a166a21103ad4 (patch) | |
| tree | 355a5723166422e39fe43cc93d99de6674eaecba /src/target/arm_adi_v5.c | |
| parent | 76b19832024930ea2d067e119227f6086c403dd2 (diff) | |
| download | riscv-openocd-ae8cdc139e12a851107e8f882c5a166a21103ad4.zip riscv-openocd-ae8cdc139e12a851107e8f882c5a166a21103ad4.tar.gz riscv-openocd-ae8cdc139e12a851107e8f882c5a166a21103ad4.tar.bz2 | |
drivers: jlink: rework to allow scans of arbitrary length, bump libjaylink
Make the J-Link driver handle everything needed for FPGA programming,
this includes arbitrary long scans and STABLECLOCKS command.
Also, bump to the latest upstream libjaylink to properly support this.
This code is heavily inspired by Andreas Fritiofson's ftdi.c.
Change-Id: Ic5fd87aa88b58ff1138dc2e0a197bb52321b1541
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2946
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src/target/arm_adi_v5.c')
0 files changed, 0 insertions, 0 deletions