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| author | Erhan Kurubas <43336369+erhankur@users.noreply.github.com> | 2022-03-01 19:05:54 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-03-01 10:05:54 -0800 |
| commit | 87c0cda00fad8ec5c42e0efb3789a2ac8808d5bc (patch) | |
| tree | 0e7c8aa7d0afc82946067f30f8e615b390159b26 /doc | |
| parent | 64f3f8877e9dbedf7b80ea3d544e5a6a5b17ed61 (diff) | |
| download | riscv-openocd-87c0cda00fad8ec5c42e0efb3789a2ac8808d5bc.zip riscv-openocd-87c0cda00fad8ec5c42e0efb3789a2ac8808d5bc.tar.gz riscv-openocd-87c0cda00fad8ec5c42e0efb3789a2ac8808d5bc.tar.bz2 | |
riscv: implement maskisr steponly command (#681)
* riscv: implement maskisr steponly command
Change-Id: I1a3b666d466b064460c3acc307a36485ce165601
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
* riscv: restore triggers and irq mask inside step function
Change-Id: I4e1b0665f4f2f75e42a6191c61634bdfa19ae2fb
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
* doc: update for riscv set_maskisr command
Change-Id: Ia7d3a6df846cfc4568d79558f719e93f038aee9b
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/openocd.texi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 9e2f5e8..a94e4be 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -10424,6 +10424,13 @@ tunneled DR scan consists of: @end deffn +@deffn {Command} {riscv set_maskisr} [@option{off}|@option{steponly}] +Selects whether interrupts will be disabled when single stepping. The default configuration is @option{off}. +This feature is only useful on hardware that always steps into interrupts and doesn't support dcsr.stepie=0. +Keep in mind, disabling the option does not guarantee that single stepping will go into interrupt handlers. +To make that happen, dcsr.stepie would have to be written to 1 as well. +@end deffn + @deffn {Command} {riscv set_ebreakm} on|off Control dcsr.ebreakm. When on (default), M-mode ebreak instructions trap to OpenOCD. When off, they generate a breakpoint exception handled internally. |