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| author | Palmer Dabbelt <palmer@dabbelt.com> | 2018-05-30 21:31:53 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@dabbelt.com> | 2018-05-30 21:31:53 -0700 |
| commit | 6db8afb9d63e01e370d38cf54adbc53a0dda935b (patch) | |
| tree | 81544eea17da2ab6f43239633d04701c35af2f22 | |
| parent | 9d975bf8f0fd31a7ff4664a30ca0809326a771f6 (diff) | |
| download | riscv-openocd-6db8afb9d63e01e370d38cf54adbc53a0dda935b.zip riscv-openocd-6db8afb9d63e01e370d38cf54adbc53a0dda935b.tar.gz riscv-openocd-6db8afb9d63e01e370d38cf54adbc53a0dda935b.tar.bz2 | |
Flush the current cache first
| -rw-r--r-- | src/target/riscv/riscv-013.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 9946976..655df5a 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -1720,6 +1720,18 @@ static int execute_fence(struct target *target) { int old_hartid = riscv_current_hartid(target); + /* FIXME: For non-coherent systems we need to flush the caches right + * here, but there's no ISA-defined way of doing that. */ + { + struct riscv_program program; + riscv_program_init(&program, target); + riscv_program_fence_i(&program); + riscv_program_fence(&program); + int result = riscv_program_exec(&program, target); + if (result != ERROR_OK) + LOG_ERROR("Unable to execute fence"); + } + for (int i = 0; i < riscv_count_harts(target); ++i) { if (!riscv_hart_enabled(target, i)) continue; |