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authorTim Newsome <tim@sifive.com>2017-10-23 14:18:09 -0700
committerTim Newsome <tim@sifive.com>2017-10-23 14:45:58 -0700
commit3ba6d46fc29c4ee7b6b5f90423a3cf734f0a04e3 (patch)
treeda696812f13cff668740ca4006d7e70981e4639a
parent5425c871c97b5a80c8552a0bc3dca963761a2f03 (diff)
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Remove unused functionality.
Change-Id: Ic70cebd62bbd04f7ae5566504fbb279a11de57f0
-rw-r--r--src/target/riscv/program.c225
-rw-r--r--src/target/riscv/program.h43
2 files changed, 0 insertions, 268 deletions
diff --git a/src/target/riscv/program.c b/src/target/riscv/program.c
index f02e4ea..e7238dd 100644
--- a/src/target/riscv/program.c
+++ b/src/target/riscv/program.c
@@ -11,21 +11,15 @@
#include "asm.h"
#include "encoding.h"
-riscv_addr_t riscv_program_gal(struct riscv_program *p, riscv_addr_t addr);
-int riscv_program_lah(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr);
-int riscv_program_lal(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr);
-
/* Program interface. */
int riscv_program_init(struct riscv_program *p, struct target *target)
{
memset(p, 0, sizeof(*p));
p->target = target;
p->instruction_count = 0;
- p->writes_memory = 0;
p->target_xlen = riscv_xlen(target);
for (size_t i = 0; i < RISCV_REGISTER_COUNT; ++i) {
p->writes_xreg[i] = 0;
- p->in_use[i] = 0;
}
for(size_t i = 0; i < RISCV_MAX_DEBUG_BUFFER_SIZE; ++i)
@@ -58,14 +52,6 @@ int riscv_program_exec(struct riscv_program *p, struct target *t)
}
}
- if (p->writes_memory && (riscv_program_fence(p) != ERROR_OK)) {
- LOG_ERROR("Unable to write fence");
- for(size_t i = 0; i < riscv_debug_buffer_size(p->target); ++i)
- LOG_ERROR("ram[%02x]: DASM(0x%08lx) [0x%08lx]", (int)i, (long)p->debug_buffer[i], (long)p->debug_buffer[i]);
- abort();
- return ERROR_FAIL;
- }
-
if (riscv_program_ebreak(p) != ERROR_OK) {
LOG_ERROR("Unable to write ebreak");
for(size_t i = 0; i < riscv_debug_buffer_size(p->target); ++i)
@@ -95,160 +81,34 @@ int riscv_program_exec(struct riscv_program *p, struct target *t)
int riscv_program_swr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno b, int offset)
{
- p->writes_memory = 1;
return riscv_program_insert(p, sw(d, b, offset));
}
int riscv_program_shr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno b, int offset)
{
- p->writes_memory = 1;
return riscv_program_insert(p, sh(d, b, offset));
}
int riscv_program_sbr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno b, int offset)
{
- p->writes_memory = 1;
return riscv_program_insert(p, sb(d, b, offset));
}
int riscv_program_lwr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno b, int offset)
{
- p->writes_memory = 1;
return riscv_program_insert(p, lw(d, b, offset));
}
int riscv_program_lhr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno b, int offset)
{
- p->writes_memory = 1;
return riscv_program_insert(p, lh(d, b, offset));
}
int riscv_program_lbr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno b, int offset)
{
- p->writes_memory = 1;
return riscv_program_insert(p, lb(d, b, offset));
}
-int riscv_program_lx(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr)
-{
- switch (p->target_xlen) {
- case 64: return riscv_program_ld(p, d, addr);
- case 32: return riscv_program_lw(p, d, addr);
- }
-
- LOG_ERROR("unknown xlen %d", p->target_xlen);
- abort();
- return -1;
-}
-
-int riscv_program_ld(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr)
-{
- enum gdb_regno t = riscv_program_gah(p, addr) == 0 ? GDB_REGNO_X0 : d;
- if (riscv_program_lah(p, d, addr) != ERROR_OK)
- return ERROR_FAIL;
- if (riscv_program_insert(p, ld(d, t, riscv_program_gal(p, addr))) != ERROR_OK)
- return ERROR_FAIL;
- return ERROR_OK;
-}
-
-int riscv_program_lw(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr)
-{
- enum gdb_regno t = riscv_program_gah(p, addr) == 0 ? GDB_REGNO_X0 : d;
- if (riscv_program_lah(p, d, addr) != ERROR_OK)
- return ERROR_FAIL;
- if (riscv_program_insert(p, lw(d, t, riscv_program_gal(p, addr))) != ERROR_OK)
- return ERROR_FAIL;
- return ERROR_OK;
-}
-
-int riscv_program_lh(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr)
-{
- enum gdb_regno t = riscv_program_gah(p, addr) == 0 ? GDB_REGNO_X0 : d;
- if (riscv_program_lah(p, d, addr) != ERROR_OK)
- return ERROR_FAIL;
- if (riscv_program_insert(p, lh(d, t, riscv_program_gal(p, addr))) != ERROR_OK)
- return ERROR_FAIL;
- return ERROR_OK;
-}
-
-int riscv_program_lb(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr)
-{
- enum gdb_regno t = riscv_program_gah(p, addr) == 0 ? GDB_REGNO_X0 : d;
- if (riscv_program_lah(p, t, addr) != ERROR_OK)
- return ERROR_FAIL;
- if (riscv_program_insert(p, lb(d, t, riscv_program_gal(p, addr))) != ERROR_OK)
- return ERROR_FAIL;
- return ERROR_OK;
-}
-
-int riscv_program_sx(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr)
-{
- switch (p->target_xlen) {
- case 64: return riscv_program_sd(p, d, addr);
- case 32: return riscv_program_sw(p, d, addr);
- }
-
- LOG_ERROR("unknown xlen %d", p->target_xlen);
- abort();
- return -1;
-}
-
-int riscv_program_sd(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr)
-{
- enum gdb_regno t = riscv_program_gah(p, addr) == 0
- ? GDB_REGNO_X0
- : riscv_program_gettemp(p);
- if (riscv_program_lah(p, t, addr) != ERROR_OK)
- return ERROR_FAIL;
- if (riscv_program_insert(p, sd(d, t, riscv_program_gal(p, addr))) != ERROR_OK)
- return ERROR_FAIL;
- riscv_program_puttemp(p, t);
- p->writes_memory = true;
- return ERROR_OK;
-}
-
-int riscv_program_sw(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr)
-{
- enum gdb_regno t = riscv_program_gah(p, addr) == 0
- ? GDB_REGNO_X0
- : riscv_program_gettemp(p);
- if (riscv_program_lah(p, t, addr) != ERROR_OK)
- return ERROR_FAIL;
- if (riscv_program_insert(p, sw(d, t, riscv_program_gal(p, addr))) != ERROR_OK)
- return ERROR_FAIL;
- riscv_program_puttemp(p, t);
- p->writes_memory = true;
- return ERROR_OK;
-}
-
-int riscv_program_sh(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr)
-{
- enum gdb_regno t = riscv_program_gah(p, addr) == 0
- ? GDB_REGNO_X0
- : riscv_program_gettemp(p);
- if (riscv_program_lah(p, t, addr) != ERROR_OK)
- return ERROR_FAIL;
- if (riscv_program_insert(p, sh(d, t, riscv_program_gal(p, addr))) != ERROR_OK)
- return ERROR_FAIL;
- riscv_program_puttemp(p, t);
- p->writes_memory = true;
- return ERROR_OK;
-}
-
-int riscv_program_sb(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr)
-{
- enum gdb_regno t = riscv_program_gah(p, addr) == 0
- ? GDB_REGNO_X0
- : riscv_program_gettemp(p);
- if (riscv_program_lah(p, t, addr) != ERROR_OK)
- return ERROR_FAIL;
- if (riscv_program_insert(p, sb(d, t, riscv_program_gal(p, addr))) != ERROR_OK)
- return ERROR_FAIL;
- riscv_program_puttemp(p, t);
- p->writes_memory = true;
- return ERROR_OK;
-}
-
int riscv_program_csrr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno csr)
{
assert(csr >= GDB_REGNO_CSR0 && csr <= GDB_REGNO_CSR4095);
@@ -261,12 +121,6 @@ int riscv_program_csrw(struct riscv_program *p, enum gdb_regno s, enum gdb_regno
return riscv_program_insert(p, csrrw(GDB_REGNO_X0, s, csr - GDB_REGNO_CSR0));
}
-int riscv_program_csrrw(struct riscv_program *p, enum gdb_regno d, enum gdb_regno s, enum gdb_regno csr)
-{
- assert(csr >= GDB_REGNO_CSR0);
- return riscv_program_insert(p, csrrw(d, s, csr - GDB_REGNO_CSR0));
-}
-
int riscv_program_fence_i(struct riscv_program *p)
{
return riscv_program_insert(p, fence_i());
@@ -288,90 +142,11 @@ int riscv_program_ebreak(struct riscv_program *p)
return riscv_program_insert(p, ebreak());
}
-int riscv_program_lui(struct riscv_program *p, enum gdb_regno d, int32_t u)
-{
- return riscv_program_insert(p, lui(d, u));
-}
-
int riscv_program_addi(struct riscv_program *p, enum gdb_regno d, enum gdb_regno s, int16_t u)
{
return riscv_program_insert(p, addi(d, s, u));
}
-int riscv_program_li(struct riscv_program *p, enum gdb_regno d, riscv_reg_t c)
-{
- if (riscv_program_lui(p, d, c >> 12) != ERROR_OK)
- return ERROR_FAIL;
- if (riscv_program_addi(p, d, d, c & 0xFFF) != ERROR_OK)
- return ERROR_FAIL;
- return ERROR_OK;
-}
-
-int riscv_program_dont_restore_register(struct riscv_program *p, enum gdb_regno r)
-{
- assert(r < RISCV_REGISTER_COUNT);
- p->writes_xreg[r] = 0;
- return ERROR_OK;
-}
-
-int riscv_program_do_restore_register(struct riscv_program *p, enum gdb_regno r)
-{
- assert(r < RISCV_REGISTER_COUNT);
- p->writes_xreg[r] = 1;
- return ERROR_OK;
-}
-
-enum gdb_regno riscv_program_gettemp(struct riscv_program *p)
-{
- for (size_t i = GDB_REGNO_S0; i <= GDB_REGNO_XPR31; ++i) {
- if (p->in_use[i]) continue;
-
- riscv_program_do_restore_register(p, i);
- p->in_use[i] = 1;
- return i;
- }
-
- LOG_ERROR("You've run out of temporary registers. This is impossible.");
- abort();
-}
-
-void riscv_program_puttemp(struct riscv_program *p, enum gdb_regno r)
-{
- assert(r < RISCV_REGISTER_COUNT);
- p->in_use[r] = 0;
-}
-
-/* Helper functions. */
-riscv_addr_t riscv_program_gah(struct riscv_program *p, riscv_addr_t addr)
-{
- return addr >> 12;
-}
-
-riscv_addr_t riscv_program_gal(struct riscv_program *p, riscv_addr_t addr)
-{
- if (addr > 0) {
- return (addr & 0x7FF);
- } else {
- return 0;
- }
-}
-
-int riscv_program_lah(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr)
-{
- riscv_addr_t ah = riscv_program_gah(p, addr);
- if (ah == 0)
- return ERROR_OK;
- return riscv_program_lui(p, d, ah);
-}
-
-int riscv_program_lal(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr)
-{
- riscv_addr_t al = riscv_program_gal(p, addr);
- if (al == 0)
- return ERROR_OK;
- return riscv_program_addi(p, d, d, al);
-}
-
int riscv_program_insert(struct riscv_program *p, riscv_insn_t i)
{
if (p->instruction_count >= riscv_debug_buffer_size(p->target)) {
diff --git a/src/target/riscv/program.h b/src/target/riscv/program.h
index 56a1a9a..d641be1 100644
--- a/src/target/riscv/program.h
+++ b/src/target/riscv/program.h
@@ -21,10 +21,6 @@ struct riscv_program {
/* Side effects of executing this program. These must be accounted for
* in order to maintain correct executing of the target system. */
bool writes_xreg[RISCV_REGISTER_COUNT];
- bool writes_memory;
-
- /* When a register is used it will be set in this array. */
- bool in_use[RISCV_REGISTER_COUNT];
/* XLEN on the target. */
int target_xlen;
@@ -59,60 +55,21 @@ int riscv_program_save_to_dscratch(struct riscv_program *p, enum gdb_regno to_sa
/* Helpers to assembly various instructions. Return 0 on success. These might
* assembly into a multi-instruction sequence that overwrites some other
* register, but those will be properly saved and restored. */
-int riscv_program_lx(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr);
-int riscv_program_ld(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr);
-int riscv_program_lw(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr);
-int riscv_program_lh(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr);
-int riscv_program_lb(struct riscv_program *p, enum gdb_regno d, riscv_addr_t addr);
-
-int riscv_program_sx(struct riscv_program *p, enum gdb_regno s, riscv_addr_t addr);
-int riscv_program_sd(struct riscv_program *p, enum gdb_regno s, riscv_addr_t addr);
-int riscv_program_sw(struct riscv_program *p, enum gdb_regno s, riscv_addr_t addr);
-int riscv_program_sh(struct riscv_program *p, enum gdb_regno s, riscv_addr_t addr);
-int riscv_program_sb(struct riscv_program *p, enum gdb_regno s, riscv_addr_t addr);
-
-int riscv_program_lxr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno a, int o);
-int riscv_program_ldr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno a, int o);
int riscv_program_lwr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno a, int o);
int riscv_program_lhr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno a, int o);
int riscv_program_lbr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno a, int o);
-int riscv_program_sxr(struct riscv_program *p, enum gdb_regno s, enum gdb_regno a, int o);
-int riscv_program_sdr(struct riscv_program *p, enum gdb_regno s, enum gdb_regno a, int o);
int riscv_program_swr(struct riscv_program *p, enum gdb_regno s, enum gdb_regno a, int o);
int riscv_program_shr(struct riscv_program *p, enum gdb_regno s, enum gdb_regno a, int o);
int riscv_program_sbr(struct riscv_program *p, enum gdb_regno s, enum gdb_regno a, int o);
int riscv_program_csrr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno csr);
int riscv_program_csrw(struct riscv_program *p, enum gdb_regno s, enum gdb_regno csr);
-int riscv_program_csrrw(struct riscv_program *p, enum gdb_regno d, enum gdb_regno s, enum gdb_regno csr);
int riscv_program_fence_i(struct riscv_program *p);
int riscv_program_fence(struct riscv_program *p);
int riscv_program_ebreak(struct riscv_program *p);
-int riscv_program_lui(struct riscv_program *p, enum gdb_regno d, int32_t u);
int riscv_program_addi(struct riscv_program *p, enum gdb_regno d, enum gdb_regno s, int16_t i);
-/* Assembler macros. */
-int riscv_program_li(struct riscv_program *p, enum gdb_regno d, riscv_reg_t c);
-int riscv_program_la(struct riscv_program *p, enum gdb_regno d, riscv_addr_t a);
-
-/* Register allocation. The user is expected to have obtained temporary
- * registers using these fuctions. Additionally, there is an interface for
- * reserving registers -- it's expected that this has been called as the first
- * thing in the program's execution to reserve registers that can't be touched
- * by the program's execution. */
-enum gdb_regno riscv_program_gettemp(struct riscv_program *p);
-void riscv_program_puttemp(struct riscv_program *p, enum gdb_regno r);
-
-/* Executing a program usually causes the registers that get overwritten to be
- * saved and restored. Calling this prevents the given register from actually
- * being restored as a result of all activity in this program. */
-int riscv_program_dont_restore_register(struct riscv_program *p, enum gdb_regno r);
-int riscv_program_do_restore_register(struct riscv_program *p, enum gdb_regno r);
-
-/* Addressing functions. */
-riscv_addr_t riscv_program_gah(struct riscv_program *p, riscv_addr_t addr);
-
#endif