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| author | Evgeniy Naydanov <evgeniy.naydanov@syntacore.com> | 2023-08-03 17:57:02 +0300 |
|---|---|---|
| committer | Evgeniy Naydanov <evgeniy.naydanov@syntacore.com> | 2023-08-03 17:58:16 +0300 |
| commit | 9b558838b1c457c9e381dafbb667edc97514bc60 (patch) | |
| tree | 0909bbffc3c4c84e5c10ea58a42207711bb665ae | |
| parent | ee5c5c292fd04f62f88fc0ae3a8d69c403aa2803 (diff) | |
| download | riscv-openocd-9b558838b1c457c9e381dafbb667edc97514bc60.zip riscv-openocd-9b558838b1c457c9e381dafbb667edc97514bc60.tar.gz riscv-openocd-9b558838b1c457c9e381dafbb667edc97514bc60.tar.bz2 | |
target/riscv: improve error handling in trigger setup
Change-Id: I235973a3c44fb3d934925c74ffee47f8bd96de0d
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
| -rw-r--r-- | src/target/riscv/riscv.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 7962a47..ac9d35b 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -897,7 +897,7 @@ static int maybe_add_trigger_t2_t6(struct target *target, }; ret = try_setup_single_match_trigger(target, trigger, eq); if (ret != ERROR_OK) - return ERROR_FAIL; + return ret; if (trigger->length > 1) { LOG_TARGET_DEBUG(target, "Trigger will match accesses at address 0x%" TARGET_PRIxADDR @@ -1042,7 +1042,9 @@ static int add_trigger(struct target *target, struct trigger *trigger) break; } while (0); - riscv_set_register(target, GDB_REGNO_TSELECT, tselect); + if (riscv_set_register(target, GDB_REGNO_TSELECT, tselect) != ERROR_OK && + ret == ERROR_OK) + return ERROR_FAIL; return ret; } |