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| author | Evgeniy Naydanov <109669442+en-sc@users.noreply.github.com> | 2024-04-14 17:00:24 +0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-04-14 17:00:24 +0300 |
| commit | 3991492cc101f4289be06ec7dc23c6ad7748a74a (patch) | |
| tree | 263dc34e8e8e359c3594d07a3da78eec9883dd16 | |
| parent | 740cdc78f3fe46885fecf2b51595ba3ad268d220 (diff) | |
| parent | fbd9b3d5f4d135f1debc8e8c42ea23a854cd0ee4 (diff) | |
| download | riscv-openocd-3991492cc101f4289be06ec7dc23c6ad7748a74a.zip riscv-openocd-3991492cc101f4289be06ec7dc23c6ad7748a74a.tar.gz riscv-openocd-3991492cc101f4289be06ec7dc23c6ad7748a74a.tar.bz2 | |
Merge pull request #1040 from rivos-eblot/dev/ebl/read_mem_dmibase
target/riscv: Add missing DM base offset to read_memory_bus_v1()
| -rw-r--r-- | src/target/riscv/riscv-013.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 34aba8f..dae4a59 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -3360,6 +3360,10 @@ static int read_memory_bus_v1(struct target *target, target_addr_t address, return ERROR_NOT_IMPLEMENTED; } + dm013_info_t *dm = get_dm(target); + if (!dm) + return ERROR_FAIL; + RISCV013_INFO(info); target_addr_t next_address = address; target_addr_t end_address = address + (increment ? count : 1) * size; @@ -3408,7 +3412,7 @@ static int read_memory_bus_v1(struct target *target, target_addr_t address, } keep_alive(); dmi_status_t status = dmi_scan(target, NULL, &sbvalue[next_read_j], - DMI_OP_READ, sbdata[j], 0, false); + DMI_OP_READ, sbdata[j] + dm->base, 0, false); /* By reading from sbdata0, we have just initiated another system bus read. * If necessary add a delay so the read can finish. */ if (j == 0 && info->bus_master_read_delay) { |