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| author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2019-06-01 14:49:36 +0200 |
|---|---|---|
| committer | Tomas Vanek <vanekt@fbl.cz> | 2019-06-13 12:40:16 +0100 |
| commit | e6990bdd00e80b48ba49e4b440c8d654a9431a34 (patch) | |
| tree | 081b272e0c4c6109f85d760bdf62296abb5d49c6 | |
| parent | 8ed19a2e29bd438db055b2bcda336ddf5a041410 (diff) | |
| download | riscv-openocd-e6990bdd00e80b48ba49e4b440c8d654a9431a34.zip riscv-openocd-e6990bdd00e80b48ba49e4b440c8d654a9431a34.tar.gz riscv-openocd-e6990bdd00e80b48ba49e4b440c8d654a9431a34.tar.bz2 | |
flash/stm32h7x: fix register names to comply with RM0399 Rev2 and RM0433 Rev6
Change-Id: I085d86a2a47f4aeef93a99238e3b80ee294d46df
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5192
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
| -rw-r--r-- | src/flash/nor/stm32h7x.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c index cb96cf2..512aca5 100644 --- a/src/flash/nor/stm32h7x.c +++ b/src/flash/nor/stm32h7x.c @@ -38,18 +38,18 @@ #define FLASH_SR 0x10 #define FLASH_CCR 0x14 #define FLASH_OPTCR 0x18 -#define FLASH_OPTCUR 0x1C -#define FLASH_OPTPRG 0x20 +#define FLASH_OPTSR_CUR 0x1C +#define FLASH_OPTSR_PRG 0x20 #define FLASH_OPTCCR 0x24 -#define FLASH_WPSNCUR 0x38 -#define FLASH_WPSNPRG 0x3C +#define FLASH_WPSN_CUR 0x38 +#define FLASH_WPSN_PRG 0x3C /* FLASH_CR register bits */ #define FLASH_LOCK (1 << 0) #define FLASH_PG (1 << 1) #define FLASH_SER (1 << 2) -#define FLASH_BER_CMD (1 << 3) +#define FLASH_BER (1 << 3) #define FLASH_PSIZE_8 (0 << 4) #define FLASH_PSIZE_16 (1 << 4) #define FLASH_PSIZE_32 (2 << 4) @@ -314,7 +314,7 @@ static int stm32x_read_options(struct flash_bank *bank) stm32x_info = bank->driver_priv; /* read current option bytes */ - int retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCUR, &optiondata); + int retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTSR_CUR, &optiondata); if (retval != ERROR_OK) return retval; @@ -328,13 +328,13 @@ static int stm32x_read_options(struct flash_bank *bank) LOG_INFO("Device Security Bit Set"); /* read current WPSN option bytes */ - retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSNCUR, &optiondata); + retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSN_CUR, &optiondata); if (retval != ERROR_OK) return retval; stm32x_info->option_bytes.protection = optiondata & 0xff; /* read current WPSN2 option bytes */ - retval = target_read_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSNCUR, &optiondata); + retval = target_read_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSN_CUR, &optiondata); if (retval != ERROR_OK) return retval; stm32x_info->option_bytes.protection2 = optiondata & 0xff; @@ -361,19 +361,19 @@ static int stm32x_write_options(struct flash_bank *bank) optiondata |= (stm32x_info->option_bytes.user3_options & 0xa3) << 24; /* program options */ - retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTPRG, optiondata); + retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTSR_PRG, optiondata); if (retval != ERROR_OK) return retval; optiondata = stm32x_info->option_bytes.protection & 0xff; /* Program protection WPSNPRG */ - retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSNPRG, optiondata); + retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSN_PRG, optiondata); if (retval != ERROR_OK) return retval; optiondata = stm32x_info->option_bytes.protection2 & 0xff; /* Program protection WPSNPRG2 */ - retval = target_write_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSNPRG, optiondata); + retval = target_write_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSN_PRG, optiondata); if (retval != ERROR_OK) return retval; @@ -1030,12 +1030,12 @@ static int stm32x_mass_erase(struct flash_bank *bank) return retval; /* mass erase flash memory bank */ - retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), FLASH_BER_CMD | FLASH_PSIZE_64); + retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), FLASH_BER | FLASH_PSIZE_64); if (retval != ERROR_OK) return retval; retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), - FLASH_BER_CMD | FLASH_PSIZE_64 | FLASH_START); + FLASH_BER | FLASH_PSIZE_64 | FLASH_START); if (retval != ERROR_OK) return retval; |