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| author | Hsiangkai <kai.wang@sifive.com> | 2020-01-01 03:27:22 +0800 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2019-12-31 11:27:22 -0800 |
| commit | 2c3f099b73be5079e509edfc5db554289fad2bcc (patch) | |
| tree | 60c4f14a62357e1b6671e8d3cea7441ea095e78b | |
| parent | 9886f7737403d2ea378dd3349de4b70b1b62ce54 (diff) | |
| download | riscv-openocd-2c3f099b73be5079e509edfc5db554289fad2bcc.zip riscv-openocd-2c3f099b73be5079e509edfc5db554289fad2bcc.tar.gz riscv-openocd-2c3f099b73be5079e509edfc5db554289fad2bcc.tar.bz2 | |
Fix bugs. Do not touch SATP if there is no MMU. (#435)
* riscv: Fix bugs. Do not touch SATP if there is no MMU.
In some platform, there is no SATP register at all.
OpenOCD will report unexpected errors if SATP is unreadable.
So, use 'riscv_enable_virtual' to guard SATP access.
* riscv: fix format typo.
| -rw-r--r-- | src/target/riscv/riscv.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 59353e2..beca76c 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -1364,6 +1364,11 @@ static int riscv_select_current_hart(struct target *target) static int riscv_mmu(struct target *target, int *enabled) { + if (!riscv_enable_virt2phys) { + *enabled = 0; + return ERROR_OK; + } + if (riscv_rtos_enabled(target)) riscv_set_current_hartid(target, target->rtos->current_thread - 1); @@ -1483,9 +1488,6 @@ static int riscv_address_translate(struct target *target, static int riscv_virt2phys(struct target *target, target_addr_t virtual, target_addr_t *physical) { - if (!riscv_enable_virt2phys) - return ERROR_FAIL; - int enabled; if (riscv_mmu(target, &enabled) == ERROR_OK) { if (!enabled) |