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| author | Palmer Dabbelt <palmer@dabbelt.com> | 2017-04-14 16:23:16 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@dabbelt.com> | 2017-04-14 16:23:16 -0700 |
| commit | 9a04773c755b6813a7e241f5fbf6dbba2b57a988 (patch) | |
| tree | 1f60b62d5557404b7134b06c0f3eb58d859a4806 | |
| parent | 62659905ca43a341c6c83fa34e93730db2ecb8a5 (diff) | |
| download | riscv-openocd-9a04773c755b6813a7e241f5fbf6dbba2b57a988.zip riscv-openocd-9a04773c755b6813a7e241f5fbf6dbba2b57a988.tar.gz riscv-openocd-9a04773c755b6813a7e241f5fbf6dbba2b57a988.tar.bz2 | |
endian
| -rw-r--r-- | src/target/riscv/riscv-013.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 94e351f..1ca00f6 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -634,9 +634,14 @@ static int register_read_direct(struct target *target, uint64_t *value, uint32_t return exec_out; } - *value = riscv_program_read_ram(&program, output); - if (riscv_xlen(target) == 64) - *value = *value | ((uint64_t)(riscv_program_read_ram(&program, output + 4)) << 32); + *value = 0; + switch (riscv_xlen(target)) { + case 64: + *value |= ((uint64_t)(riscv_program_read_ram(&program, output + 4))) << 32; + case 32: + *value |= riscv_program_read_ram(&program, output); + } + LOG_DEBUG("register 0x%x = 0x%" PRIx64, number, *value); return ERROR_OK; } |