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| author | Tim Newsome <tim@sifive.com> | 2018-10-18 10:06:23 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-10-18 10:06:23 -0700 |
| commit | b986d29bc9a9b561b7a186c7c25b9243e0e46f2d (patch) | |
| tree | cf60b5fb6d4ac2a87eeea66b1e27481b0be51a0a | |
| parent | 35eed36ffdd082f5abfc16d4cc93511f6e225284 (diff) | |
| download | riscv-openocd-b986d29bc9a9b561b7a186c7c25b9243e0e46f2d.zip riscv-openocd-b986d29bc9a9b561b7a186c7c25b9243e0e46f2d.tar.gz riscv-openocd-b986d29bc9a9b561b7a186c7c25b9243e0e46f2d.tar.bz2 | |
Fix segfault in riscv_deinit_target(). (#306)
This would happen when OpenOCD is unable to connect to the JTAG device.
Change-Id: I1785fd5f5a20db9b4b574bdddfe3eab9bdc0b0bc
| -rw-r--r-- | src/target/riscv/riscv.c | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 0ba2e15..293572a 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -280,12 +280,17 @@ static void riscv_deinit_target(struct target *target) free(info); } /* Free the shared structure use for most registers. */ - free(target->reg_cache->reg_list[0].arch_info); - /* Free the ones we allocated separately. */ - for (unsigned i = GDB_REGNO_COUNT; i < target->reg_cache->num_regs; i++) - free(target->reg_cache->reg_list[i].arch_info); - free(target->reg_cache->reg_list); - free(target->reg_cache); + if (target->reg_cache) { + if (target->reg_cache->reg_list) { + if (target->reg_cache->reg_list[0].arch_info) + free(target->reg_cache->reg_list[0].arch_info); + /* Free the ones we allocated separately. */ + for (unsigned i = GDB_REGNO_COUNT; i < target->reg_cache->num_regs; i++) + free(target->reg_cache->reg_list[i].arch_info); + free(target->reg_cache->reg_list); + } + free(target->reg_cache); + } target->arch_info = NULL; } |