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| author | Tomas Vanek <vanekt@fbl.cz> | 2017-10-31 12:32:22 +0100 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2017-12-12 21:18:10 +0000 |
| commit | 19f8f58c0d4d9ee618969254a368e4396657b946 (patch) | |
| tree | 56ce90a0b357ea9ad726c448657f8c6c2e999e20 | |
| parent | 3f6ab8e6a6f80f4a6486c688793daad866d21863 (diff) | |
| download | riscv-openocd-19f8f58c0d4d9ee618969254a368e4396657b946.zip riscv-openocd-19f8f58c0d4d9ee618969254a368e4396657b946.tar.gz riscv-openocd-19f8f58c0d4d9ee618969254a368e4396657b946.tar.bz2 | |
target: remove unused event definitions
Events reset-halt-pre, reset-halt-post, reset-wait-pre and
reset-wait-post are not used anywhere.
Change-Id: I9a0f94875b102d9b08f6c2fd9d73a9f05f8e8e79
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4285
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
| -rw-r--r-- | doc/openocd.texi | 12 | ||||
| -rw-r--r-- | src/target/target.c | 4 | ||||
| -rw-r--r-- | src/target/target.h | 4 |
3 files changed, 0 insertions, 20 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 5748344..ebd03c4 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -4503,12 +4503,6 @@ and (if the target is using it) after SRST has been released on the scan chain. @item @b{reset-end} @* Issued as the final step in @command{reset} processing. -@ignore -@item @b{reset-halt-post} -@* Currently not used -@item @b{reset-halt-pre} -@* Currently not used -@end ignore @item @b{reset-init} @* Used by @b{reset init} command for board-specific initialization. This event fires after @emph{reset-deassert-post}. @@ -4525,12 +4519,6 @@ before @command{reset_init} is called. This is the most robust place to use @command{jtag_rclk} or @command{adapter_khz} to switch to a low JTAG clock rate, when reset disables PLLs needed to use a fast clock. -@ignore -@item @b{reset-wait-pos} -@* Currently not used -@item @b{reset-wait-pre} -@* Currently not used -@end ignore @item @b{resume-start} @* Before any target is resumed @item @b{resume-end} diff --git a/src/target/target.c b/src/target/target.c index dcb6725..a9907b0 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -204,10 +204,6 @@ static const Jim_Nvp nvp_target_event[] = { { .value = TARGET_EVENT_RESET_ASSERT_POST, .name = "reset-assert-post" }, { .value = TARGET_EVENT_RESET_DEASSERT_PRE, .name = "reset-deassert-pre" }, { .value = TARGET_EVENT_RESET_DEASSERT_POST, .name = "reset-deassert-post" }, - { .value = TARGET_EVENT_RESET_HALT_PRE, .name = "reset-halt-pre" }, - { .value = TARGET_EVENT_RESET_HALT_POST, .name = "reset-halt-post" }, - { .value = TARGET_EVENT_RESET_WAIT_PRE, .name = "reset-wait-pre" }, - { .value = TARGET_EVENT_RESET_WAIT_POST, .name = "reset-wait-post" }, { .value = TARGET_EVENT_RESET_INIT, .name = "reset-init" }, { .value = TARGET_EVENT_RESET_END, .name = "reset-end" }, diff --git a/src/target/target.h b/src/target/target.h index 53f9e26..0096cae 100644 --- a/src/target/target.h +++ b/src/target/target.h @@ -253,10 +253,6 @@ enum target_event { TARGET_EVENT_RESET_ASSERT_POST, TARGET_EVENT_RESET_DEASSERT_PRE, TARGET_EVENT_RESET_DEASSERT_POST, - TARGET_EVENT_RESET_HALT_PRE, - TARGET_EVENT_RESET_HALT_POST, - TARGET_EVENT_RESET_WAIT_PRE, - TARGET_EVENT_RESET_WAIT_POST, TARGET_EVENT_RESET_INIT, TARGET_EVENT_RESET_END, |