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| author | Megan Wachs <megan@sifive.com> | 2017-05-01 09:37:48 -0700 |
|---|---|---|
| committer | Megan Wachs <megan@sifive.com> | 2017-05-01 09:37:48 -0700 |
| commit | 84627503578d2611845d678a1db9b03d1d18f6b6 (patch) | |
| tree | a24a6a5b6cad3c4635d2585e3cec6af06cb0d516 | |
| parent | ad1cf13ef4259c76a7fa9f19b960490b826df17a (diff) | |
| download | riscv-openocd-84627503578d2611845d678a1db9b03d1d18f6b6.zip riscv-openocd-84627503578d2611845d678a1db9b03d1d18f6b6.tar.gz riscv-openocd-84627503578d2611845d678a1db9b03d1d18f6b6.tar.bz2 | |
riscv-013: Correct sign extension of address on read_memory
| -rw-r--r-- | src/target/riscv/riscv-013.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 31259b2..584014d 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -1265,7 +1265,7 @@ static int read_memory(struct target *target, uint32_t address, * program execution mechanism. */ switch (riscv_xlen(target)) { case 64: - riscv_program_write_ram(&program, r_addr + 4, ((riscv_addr_t)(address - size)) >> 32); + riscv_program_write_ram(&program, r_addr + 4, (((riscv_addr_t)(address)) - size) >> 32); case 32: riscv_program_write_ram(&program, r_addr, (riscv_addr_t)(address - size)); break; @@ -1318,7 +1318,7 @@ static int read_memory(struct target *target, uint32_t address, * the data was all copied. */ riscv_addr_t cur_addr = 0xbadbeef; riscv_addr_t fin_addr = address + (count * size); - riscv_addr_t prev_addr = address - size; + riscv_addr_t prev_addr = ((riscv_addr_t) address) - size; LOG_DEBUG("writing until final address 0x%016lx", fin_addr); while (count > 1 && (cur_addr = riscv_read_debug_buffer_x(target, d_addr)) < fin_addr) { LOG_DEBUG("transferring burst starting at address 0x%016lx (previous burst was 0x%016lx)", cur_addr, prev_addr); |