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https://github.com/riscv/riscv-v-spec/commit/cf03f382ab2e5cfa24874ebc7a190fb0311e3f9a
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https://github.com/riscv/riscv-v-spec/commit/aa6032ce9ea4ef8c9f15e7dcb1fa6c7d7ac2d463
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https://github.com/riscv/riscv-v-spec/commit/5a0911c56394cc9ae2b5ade60a019cc82b2f926a
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https://github.com/riscv/riscv-v-spec/commit/b6c85cdad7c120780c2b6241b316567740c9affe#diff-34bccafef6cfe01367796362310416df
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https://github.com/riscv/riscv-v-spec/commit/159124d3da6d1fe693bffc6080ff69876aa66c43#diff-34bccafef6cfe01367796362310416df
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See https://github.com/riscv/riscv-v-spec/pull/403/
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See https://github.com/riscv/riscv-v-spec/pull/402/
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Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
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Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
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Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
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Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
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See https://github.com/riscv/riscv-v-spec/commit/063b128bd91390c64796fe1e1546a8855fdbaf35
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See https://github.com/riscv/riscv-v-spec/commit/da9ae36997183141521d3f850a935c99535ae73b
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See https://github.com/riscv/riscv-v-spec/commit/c2f3157e34d3a0f77ccbbc502bdf1530da17aba8
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See https://github.com/riscv/riscv-v-spec/pull/317
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https://github.com/riscv/riscv-v-spec/pull/295
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Closes #33
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See https://github.com/riscv/riscv-v-spec/pull/247
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See https://github.com/riscv/riscv-v-spec/pull/227
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* rvv: fault-first also support segement
based on 7.8.1, add missing segment supoort for fault first load
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
* rvv: comparision instructions has 'm' prefix
add 'm' prefix since the destination is mask register
ref:
https://github.com/riscv/riscv-v-spec/pull/181
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
* rvv: reserved vid.v operand
follow v0.7.1 change
ref:
https://github.com/riscv/riscv-v-spec/issues/160
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
* rvv: add vfrsub.vf
follow v-spec 0.7.1
ref:
https://github.com/riscv/riscv-v-spec/commit/65d2e233d4f5a95d27edf3fcd8b590b6b3deffbc
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
* rvv: add amo encoding table
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
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Note that vmiota is being renamed to viota:
https://github.com/riscv/riscv-v-spec/pull/180
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This is not currently stated in the spec, but there is a pull request to
make this explicit: https://github.com/riscv/riscv-v-spec/pull/179
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add most of vector instruction encoding described in v-spec 0.7.
except for 'Zvamo' extension
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
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