| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2019-09-12 | Add PAUSE hint instruction | Andrew Waterman | 1 | -0/+1 |
| 2018-04-25 | Add proposed FENCE.TSO encoding | Andrew Waterman | 1 | -0/+3 |
| 2017-04-25 | FMV.X.S/FMV.S.X -> FMV.X.W/FMV.W.X | Andrew Waterman | 1 | -0/+4 |
| 2016-04-30 | ERET -> xRET | Andrew Waterman | 1 | -4/+3 |
| 2015-05-09 | Update to privileged architecture version 1.7 | Andrew Waterman | 1 | -0/+5 |
| 2014-03-18 | Add rdcycleh etc. for RV32 | Andrew Waterman | 1 | -11/+14 |
| 2014-03-11 | Fix syntax error in generated opcodes | Andrew Waterman | 1 | -3/+3 |
| 2014-03-11 | New FP encoding | Andrew Waterman | 1 | -2/+9 |
| 2013-12-09 | New RDCYCLE encoding | Andrew Waterman | 1 | -5/+5 |
| 2013-11-25 | New privileged ISA | Andrew Waterman | 1 | -0/+10 |
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index : riscv-tools/riscv-opcodes.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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path: root/opcodes-pseudo