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AgeCommit message (Expand)AuthorFilesLines
2022-03-28Define HGATP_MODE_SV57X4 for Sv57x4 translation modeAndrew Waterman1-0/+1
2021-12-16Add new CSR bits defined in Privileged Spec version 1.12 (#94)Tsukasa #01 (a4lg)1-0/+31
2021-11-02Remove no-longer-used SSTATUS_VS_MASKScott Johnson1-4/+0
2021-11-02Add new hypervisor bits to mstatushScott Johnson1-0/+2
2021-07-19Virtual memory updates (#76)Daniel Lustig1-0/+3
2021-06-07Update PTE_N encodingAndrew Waterman1-1/+1
2021-01-23Removing platform-specific definitions (#59)Dan Petrisko1-6/+0
2021-01-08Add Zsn to encoding.hAndrew Waterman1-0/+1
2021-01-08Update mstatus/sstatus fields for hypervisor v0.6Andrew Waterman1-2/+8
2020-07-31hyperviosr: add csr mask and interrupt macro nameChih-Min Chao1-7/+46
2020-05-04Add DCSR_CAUSE_GROUP. (#44)Tim Newsome1-0/+1
2020-02-24Add N-extension CSRs and status bits. (#37)michael-roe1-0/+9
2020-02-13Remove mstatus.HPP; move mstatus.VS to its old locationAndrew Waterman1-3/+2
2019-11-28rvv: add vleb csr register and mstatus.vs fieldChih-Min Chao1-0/+2
2017-12-27Use old C style comments. (#18)Tim Newsome1-11/+11
2017-11-27Rename sptbr to satp and sbadaddr to stvalAndrew Waterman1-15/+15
2017-05-07Add UXl/SXLAndrew Waterman1-0/+3
2017-03-30New PMP encodingAndrew Waterman1-5/+6
2017-03-27Separate page faults from physical memory access exceptionsAndrew Waterman1-3/+2
2017-03-23Add PMPAndrew Waterman1-1/+12
2017-03-23Add TW/TVM/TSR fields to mstatusAndrew Waterman1-1/+4
2017-03-09Update SPTBR fieldsAndrew Waterman1-14/+9
2017-02-20Use gcc csr register constraintAndrew Waterman1-16/+4
2017-02-20Drop mstatus.VM fieldAndrew Waterman1-1/+0
2017-02-08Encode VM type in sptbr, not mstatusAndrew Waterman1-0/+14
2016-12-06avoid non-standard predefined macrosAndrew Waterman1-1/+1
2016-08-26Add mcontrol type constants. (#11)Tim Newsome1-0/+3
2016-08-25Make hardware triggers match latest spec.Tim Newsome1-18/+30
2016-07-06Update to new PTE formatAndrew Waterman1-33/+10
2016-06-09Update breakpoint specAndrew Waterman1-8/+15
2016-06-08Add breakpoint CSRsAndrew Waterman1-0/+10
2016-06-03Keep DCSR_XDEBUGVER unsigned.Tim Newsome1-1/+1
2016-06-01Add dret instruction and debug CSRs. (#5)Tim Newsome1-0/+23
2016-05-13Rename "Device Interrupt" to "External Interrupt"Andrew Waterman1-3/+6
2016-04-30Remove mcfgaddr; change memory mapAndrew Waterman1-3/+6
2016-03-10Allow immediates for write_csr; check for signednessAndrew Waterman1-6/+12
2016-03-03Update CSR encodingAndrew Waterman1-2/+5
2016-02-28WIP on priv spec v1.9Andrew Waterman1-5/+6
2016-02-05WIP on priv spec v1.9Andrew Waterman1-33/+37
2015-05-14Fix VM, MIP encodingAndrew Waterman1-6/+6
2015-05-09Update to privileged architecture version 1.7Andrew Waterman1-72/+70
2015-04-02Distinguish Sv39/Sv48; reserve some PPN bitsAndrew Waterman1-4/+6
2015-03-24New virtual memory implementation (Sv39)Andrew Waterman1-17/+38
2015-03-12Add referenced/dirty bits to PTEAndrew Waterman1-0/+2
2015-03-12Update to new privileged specAndrew Waterman1-32/+71
2014-02-06Reserve 16 uarch-specific read-only userspace countersAndrew Waterman1-0/+8
2014-01-21Auto-generate exception cause numbersAndrew Waterman1-13/+0
2013-11-25New privileged ISAAndrew Waterman1-0/+101
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