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riscv-tools/riscv-opcodes.git
confprec
debug
incoresemi-migration-to-new-format
llvm-encodings
master
mvp
riscv-bitmanip
rnmi
rvv
v
vadc
wfmi
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Author
Files
Lines
2017-05-17
Merge remote-tracking branch 'origin/priv-1.10'
Palmer Dabbelt
1
-1
/
+1
2017-03-31
Support generating Go code (#3)
Benjamin Barenblat
1
-0
/
+3
2017-02-14
Don't update binutils' riscv-opc.h automatically anymore
Andrew Waterman
1
-1
/
+1
2016-06-01
Update path to binutils
Andrew Waterman
1
-1
/
+1
2016-03-10
Reflect new location of encoding.h in riscv-pk
Andrew Waterman
1
-1
/
+1
2016-01-13
remove hwachaV3 definitions
Colin Schmidt
1
-7
/
+1
2015-11-06
Revert "Revert "Enable the four custom instructions""
Andrew Waterman
1
-1
/
+1
2015-09-28
Include pseudo-ops in inst.chisel
Andrew Waterman
1
-2
/
+2
2015-09-08
No need to provide GCC with encoding.h anymore
Andrew Waterman
1
-2
/
+1
2015-09-08
update to latest RVC proposal
Andrew Waterman
1
-2
/
+2
2015-05-31
RVC v1.7 encoding
Andrew Waterman
1
-1
/
+1
2015-05-09
Update to privileged architecture version 1.7
Andrew Waterman
1
-1
/
+4
2015-04-02
Distinguish Sv39/Sv48; reserve some PPN bits
Andrew Waterman
1
-1
/
+1
2015-03-30
RVC draft
Andrew Waterman
1
-1
/
+1
2015-03-12
Update to new privileged spec
Andrew Waterman
1
-2
/
+3
2014-12-14
update location of headers for new ABI/toolchain
Colin Schmidt
1
-2
/
+2
2014-11-22
Revert "Enable the four custom instructions"
Yunsup Lee
1
-1
/
+1
2014-10-24
Merge branch 'pr/1'
Yunsup Lee
1
-1
/
+1
2014-10-23
Prevent regenerating the Hwacha spike header by default
Albert Ou
1
-8
/
+7
2014-10-23
Enable the four custom instructions
Arun Thomas
1
-1
/
+1
2014-04-03
Add hwacha spike header file target
Stephen Twigg
1
-1
/
+10
2014-01-20
Merge branch 'confprec'
Quan Nguyen
1
-1
/
+1
2013-11-25
New privileged ISA
Andrew Waterman
1
-21
/
+14
2013-11-24
Merge branch 'master' into confprec
Quan Nguyen
1
-2
/
+2
2013-11-24
Add line in Makefile to parse confprec
Quan Nguyen
1
-0
/
+1
2013-11-21
fix slli/slliw encoding bug
Yunsup Lee
1
-1
/
+2
2013-10-27
Move half-precision opcodes to opcodes-hwacha-ut
Quan Nguyen
1
-1
/
+2
2013-10-17
Add half-precision floating-point instructions
Quan Nguyen
1
-2
/
+3
2013-09-21
Update ISA encoding
Andrew Waterman
1
-4
/
+5
2013-08-06
Add custom opcode space
Andrew Waterman
1
-1
/
+2
2013-07-26
Factor out Hwacha/RVC and rename MFTX/MXTF to FMV
Andrew Waterman
1
-1
/
+3
2013-04-17
add auipc, lr, sc
Andrew Waterman
1
-2
/
+6
2012-03-18
change vector fence names/encoding
Andrew Waterman
1
-0
/
+0
2012-03-03
new instructions to handle vector exceptions
Yunsup Lee
1
-2
/
+2
2011-06-19
temporary undoing of renaming
Andrew Waterman
1
-0
/
+22
2011-06-19
Renamed packages
Andrew Waterman
1
-22
/
+0
2011-06-19
[riscv-isa-run] code cleanup; added README
Andrew Waterman
1
-0
/
+22