diff options
| author | Neel Gala <neelgala@incoresemi.com> | 2022-04-08 18:07:38 +0530 |
|---|---|---|
| committer | Neel Gala <neelgala@incoresemi.com> | 2022-04-08 20:11:59 +0530 |
| commit | 816ff492f499a37db4f5a22c56bf8d50d91a8dbf (patch) | |
| tree | 157ea69a7789de104e16c2d0409387ae38ad20f1 /rv_zicbo | |
| parent | 2d51853d6aa09c03a4c8a3420bff611b72583bde (diff) | |
| download | riscv-opcodes-816ff492f499a37db4f5a22c56bf8d50d91a8dbf.zip riscv-opcodes-816ff492f499a37db4f5a22c56bf8d50d91a8dbf.tar.gz riscv-opcodes-816ff492f499a37db4f5a22c56bf8d50d91a8dbf.tar.bz2 | |
migrating Zicbo-Extension
- all prefetch insructions have been made appropriate pseudo_ops of ori instruction
Diffstat (limited to 'rv_zicbo')
| -rw-r--r-- | rv_zicbo | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/rv_zicbo b/rv_zicbo new file mode 100644 index 0000000..65a4567 --- /dev/null +++ b/rv_zicbo @@ -0,0 +1,12 @@ +# Zicbom: cache-block management instructions +cbo.clean rs1 31..20=1 14..12=2 11..7=0 6..2=0x03 1..0=3 +cbo.flush rs1 31..20=2 14..12=2 11..7=0 6..2=0x03 1..0=3 +cbo.inval rs1 31..20=0 14..12=2 11..7=0 6..2=0x03 1..0=3 + +# Zicboz: cache-block zero instruction +cbo.zero rs1 31..20=4 14..12=2 11..7=0 6..2=0x03 1..0=3 + +# Zicbop: prefetch hint pseudoinstructions +$pseudo_op rv_i::ori prefetch.i rs1 imm12hi 24..20=0 14..12=6 11..7=0 6..2=0x04 1..0=3 +$pseudo_op rv_i::ori prefetch.r rs1 imm12hi 24..20=1 14..12=6 11..7=0 6..2=0x04 1..0=3 +$pseudo_op rv_i::ori prefetch.w rs1 imm12hi 24..20=3 14..12=6 11..7=0 6..2=0x04 1..0=3 |