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| author | Neel Gala <neelgala@incoresemi.com> | 2022-04-08 17:30:06 +0530 |
|---|---|---|
| committer | Neel Gala <neelgala@incoresemi.com> | 2022-04-08 17:30:06 +0530 |
| commit | 34edfce7afebfb95f2eab017b939a5ab912696ca (patch) | |
| tree | 950fb66c316d32ec389d8d30a8624fa1c973a29a /rv64_f | |
| parent | c7192318d98c2f83000022f8065cac648759f075 (diff) | |
| download | riscv-opcodes-34edfce7afebfb95f2eab017b939a5ab912696ca.zip riscv-opcodes-34edfce7afebfb95f2eab017b939a5ab912696ca.tar.gz riscv-opcodes-34edfce7afebfb95f2eab017b939a5ab912696ca.tar.bz2 | |
migrate F-extension opcodes
- all changes involve re-ordering to preserve order in latex-tables
Diffstat (limited to 'rv64_f')
| -rw-r--r-- | rv64_f | 7 |
1 files changed, 7 insertions, 0 deletions
@@ -0,0 +1,7 @@ +# RV64F additions to RV32F + +fcvt.l.s rd rs1 24..20=2 31..27=0x18 rm 26..25=0 6..2=0x14 1..0=3 +fcvt.lu.s rd rs1 24..20=3 31..27=0x18 rm 26..25=0 6..2=0x14 1..0=3 +fcvt.s.l rd rs1 24..20=2 31..27=0x1A rm 26..25=0 6..2=0x14 1..0=3 +fcvt.s.lu rd rs1 24..20=3 31..27=0x1A rm 26..25=0 6..2=0x14 1..0=3 + |