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author | Neel Gala <neelgala@incoresemi.com> | 2022-04-08 17:24:00 +0530 |
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committer | Neel Gala <neelgala@incoresemi.com> | 2022-04-08 17:24:00 +0530 |
commit | b60b8e3075cb2a995128d06651affb4568dff6eb (patch) | |
tree | 19f50d5d69bb9b3b0a48a04e3c0718438bfdb8e4 /rv32_i | |
parent | 75b28f235e807fb6803575f952ce56b81571fd2b (diff) | |
download | riscv-opcodes-b60b8e3075cb2a995128d06651affb4568dff6eb.zip riscv-opcodes-b60b8e3075cb2a995128d06651affb4568dff6eb.tar.gz riscv-opcodes-b60b8e3075cb2a995128d06651affb4568dff6eb.tar.bz2 |
migrate I-extension opcodes
- the ordering in these files have changed to preserve the order in the latex- tables
- also ecall and ebreak has been moved to rv_i instead of keeping them in 'systems' file.
Diffstat (limited to 'rv32_i')
-rw-r--r-- | rv32_i | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -0,0 +1,4 @@ +$pseudo_op rv64_i::slli slli rd rs1 shamtw 31..25=0 14..12=1 6..2=0x04 1..0=3 +$pseudo_op rv64_i::srli srli rd rs1 shamtw 31..25=0 14..12=5 6..2=0x04 1..0=3 +$pseudo_op rv64_i::srai srai rd rs1 shamtw 31..25=32 14..12=5 6..2=0x04 1..0=3 + |