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author | Neel Gala <neelgala@incoresemi.com> | 2022-04-08 17:38:10 +0530 |
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committer | Neel Gala <neelgala@incoresemi.com> | 2022-04-08 20:11:59 +0530 |
commit | 88085a5f6bbb74cb434ff62bacc5912f41fb913b (patch) | |
tree | 64cade26276a85e63550a6b66461e39dfe075235 /rv32_c_f | |
parent | 56147c766f68cf19f826fde0e4897e988d658bcf (diff) | |
download | riscv-opcodes-88085a5f6bbb74cb434ff62bacc5912f41fb913b.zip riscv-opcodes-88085a5f6bbb74cb434ff62bacc5912f41fb913b.tar.gz riscv-opcodes-88085a5f6bbb74cb434ff62bacc5912f41fb913b.tar.bz2 |
migrate C-extension opcodes (major)
- the previous opcodes used ignore to define immediate fields instead of assigning arg names to it. This is made it difficult to parse and decode the instructions.
- this commit assigns unique names to immediate fields in accordance to what has been done elsewhere. Note these names hold no correspondence to the spec and are defined here purely to ease decoding
- This commit also splits the instructions which depend on F/D/Q in to their respective files as per new naming convention
- c.nop encoding has been changed to include hints as well.
Diffstat (limited to 'rv32_c_f')
-rw-r--r-- | rv32_c_f | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/rv32_c_f b/rv32_c_f new file mode 100644 index 0000000..8487c9a --- /dev/null +++ b/rv32_c_f @@ -0,0 +1,8 @@ +# quadrant 0 +c.flw rd_p rs1_p c_uimm7lo c_uimm7hi 1..0=0 15..13=3 +c.fsw rs1_p rs2_p c_uimm7lo c_uimm7hi 1..0=0 15..13=7 + +#quadrant 2 +c.flwsp rd c_uimm8sphi c_uimm8splo 1..0=2 15..13=3 +c.fswsp c_rs2 c_uimm8sp_s 1..0=2 15..13=7 + |