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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-05-02 15:10:42 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-05-02 15:10:42 -0700 |
| commit | 0f222ecd71680cbe7e5f47de948722667d4fdaf6 (patch) | |
| tree | 083b7cf1811b81cbafd22a7f3e3ff982e6360f71 /parse-opcodes | |
| parent | 4741340c187e3228d0a060e24f29c2365bb4e858 (diff) | |
| download | riscv-opcodes-0f222ecd71680cbe7e5f47de948722667d4fdaf6.zip riscv-opcodes-0f222ecd71680cbe7e5f47de948722667d4fdaf6.tar.gz riscv-opcodes-0f222ecd71680cbe7e5f47de948722667d4fdaf6.tar.bz2 | |
Remove mipi registers
IPI pending registers will live outside the core, so they can cause wakeup.
Diffstat (limited to 'parse-opcodes')
| -rwxr-xr-x | parse-opcodes | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/parse-opcodes b/parse-opcodes index 33ff83d..b3f8b1f 100755 --- a/parse-opcodes +++ b/parse-opcodes @@ -85,7 +85,6 @@ csrs = [ (0x342, 'mcause'), (0x343, 'mbadaddr'), (0x344, 'mip'), - (0x345, 'mipi'), (0x310, 'mucounteren'), (0x311, 'mscounteren'), (0x700, 'mucycle_delta'), |