diff options
author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2011-04-04 01:50:56 -0700 |
---|---|---|
committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2011-04-04 02:10:14 -0700 |
commit | 57d01f8e913c0fbd07ec61dae082da0db526d5da (patch) | |
tree | a96243fc5b8fdd11893b1e87bbcc3a6bd292d21f /opcodes | |
parent | dd6b8266f1d06a0e5acbbed4e8a5fcd3fcd2fcd1 (diff) | |
download | riscv-opcodes-57d01f8e913c0fbd07ec61dae082da0db526d5da.zip riscv-opcodes-57d01f8e913c0fbd07ec61dae082da0db526d5da.tar.gz riscv-opcodes-57d01f8e913c0fbd07ec61dae082da0db526d5da.tar.bz2 |
[opcodes,pk,sim,xcc] add leftover vector instructions (vf, etc.)
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes | 6 |
1 files changed, 6 insertions, 0 deletions
@@ -241,3 +241,9 @@ flwst.v rd rs1 rs2 16..12=0 11=1 10=0 9=0 8..7=2 6..2=0x03 1..0=3 fsdst.v 31..27=0 rs1 rs2 rs3 11=1 10=1 9=0 8..7=3 6..2=0x03 1..0=3 fswst.v 31..27=0 rs1 rs2 rs3 11=1 10=1 9=0 8..7=2 6..2=0x03 1..0=3 + +vcfgivl rd rs1 imm12 9..7=0 6..2=0x1C 1..0=3 +setvl rd rs1 21..10=0 9..7=1 6..2=0x1C 1..0=3 +vf 31..27=0 26..22=0 imm12 9..7=2 6..2=0x1C 1..0=3 +mov.vv rd rs1 21..10=0 9..7=3 6..2=0x1C 1..0=3 +fmov.vv rd rs1 21..10=0 9..7=4 6..2=0x1C 1..0=3 |