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author | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2010-08-03 21:09:14 -0700 |
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committer | Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU> | 2010-08-03 21:09:14 -0700 |
commit | c0fd7c19a9ade560dbae1d04a8bee19deaca0c1f (patch) | |
tree | c238e1a9484517fc85b2e8a34eaa157fd6a82c72 /opcodes | |
parent | ff4cdc131da26fdd3f0e2e2ec04127e2b55aa4eb (diff) | |
download | riscv-opcodes-c0fd7c19a9ade560dbae1d04a8bee19deaca0c1f.zip riscv-opcodes-c0fd7c19a9ade560dbae1d04a8bee19deaca0c1f.tar.gz riscv-opcodes-c0fd7c19a9ade560dbae1d04a8bee19deaca0c1f.tar.bz2 |
[sim,xcc] removed sll32/srl32/sra32 opcodes
These instructions handled static shift amounts >= 32. Since we have
a 6-bit shift amount field, these opcodes are no longer necessary.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes | 15 |
1 files changed, 6 insertions, 9 deletions
@@ -49,12 +49,9 @@ remu 31..25=0x75 14..12=1 11..5=7 rc rb ra sllv 31..25=0x75 14..12=4 11..5=1 rc rb ra srlv 31..25=0x75 14..12=4 11..5=2 rc rb ra srav 31..25=0x75 14..12=4 11..5=3 rc rb ra -sll 31..25=0x75 14..12=5 11..10=0 24..20=0 rc rb shamt -sll32 31..25=0x76 14..12=5 11..10=1 24..20=0 rc rb shamt -srl 31..25=0x75 14..12=6 11..10=0 24..20=0 rc rb shamt -srl32 31..25=0x76 14..12=6 11..10=1 24..20=0 rc rb shamt -sra 31..25=0x75 14..12=7 11..10=0 24..20=0 rc rb shamt -sra32 31..25=0x76 14..12=7 11..10=1 24..20=0 rc rb shamt +sll 31..25=0x75 14..12=5 11=0 24..20=0 rc rb shamt +srl 31..25=0x75 14..12=6 11=0 24..20=0 rc rb shamt +sra 31..25=0x75 14..12=7 11=0 24..20=0 rc rb shamt addw 31..25=0x76 14..12=0 11..5=0 rc rb ra subw 31..25=0x76 14..12=0 11..5=1 rc rb ra @@ -70,9 +67,9 @@ remuw 31..25=0x76 14..12=1 11..5=7 rc rb ra sllvw 31..25=0x76 14..12=4 11..5=1 rc rb ra srlvw 31..25=0x76 14..12=4 11..5=2 rc rb ra sravw 31..25=0x76 14..12=4 11..5=3 rc rb ra -sllw 31..25=0x76 14..12=5 11..10=0 24..20=0 rc rb shamt -srlw 31..25=0x76 14..12=6 11..10=0 24..20=0 rc rb shamt -sraw 31..25=0x76 14..12=7 11..10=0 24..20=0 rc rb shamt +sllw 31..25=0x76 14..12=5 11..10=0 24..20=0 rc rb shamtw +srlw 31..25=0x76 14..12=6 11..10=0 24..20=0 rc rb shamtw +sraw 31..25=0x76 14..12=7 11..10=0 24..20=0 rc rb shamtw lb 31..25=0x78 14..12=0 rb ra imm lh 31..25=0x78 14..12=1 rb ra imm |