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| author | Andrew Waterman <andrew@sifive.com> | 2020-03-25 12:28:23 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2021-01-08 17:06:51 -0800 |
| commit | 21b508eb9a01ab57f7ec2c6d24231c461331b681 (patch) | |
| tree | 38458083b2dd3c06c9d344d28530a472667ff15e /opcodes-rv64zfh | |
| parent | 2aa7492f08f140f5c8a9c8439add6e46f6ad3b92 (diff) | |
| download | riscv-opcodes-21b508eb9a01ab57f7ec2c6d24231c461331b681.zip riscv-opcodes-21b508eb9a01ab57f7ec2c6d24231c461331b681.tar.gz riscv-opcodes-21b508eb9a01ab57f7ec2c6d24231c461331b681.tar.bz2 | |
Add Zfh encoding
Diffstat (limited to 'opcodes-rv64zfh')
| -rw-r--r-- | opcodes-rv64zfh | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/opcodes-rv64zfh b/opcodes-rv64zfh new file mode 100644 index 0000000..5cc9f25 --- /dev/null +++ b/opcodes-rv64zfh @@ -0,0 +1,7 @@ +# RV64Zfh additions to RV32Zfh + +fcvt.l.h rd rs1 24..20=2 31..27=0x18 rm 26..25=2 6..2=0x14 1..0=3 +fcvt.lu.h rd rs1 24..20=3 31..27=0x18 rm 26..25=2 6..2=0x14 1..0=3 + +fcvt.h.l rd rs1 24..20=2 31..27=0x1A rm 26..25=2 6..2=0x14 1..0=3 +fcvt.h.lu rd rs1 24..20=3 31..27=0x1A rm 26..25=2 6..2=0x14 1..0=3 |