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author | Andrew Waterman <andrew@sifive.com> | 2020-03-03 18:09:58 -0800 |
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committer | Andrew Waterman <andrew@sifive.com> | 2020-03-03 18:09:58 -0800 |
commit | c7e17632237219090791ba67dd700c2fca432e20 (patch) | |
tree | f27522c5cb17b88ed7fd487f6e95dbefb8319fe9 /opcodes-rv64q | |
parent | 5d52b6321b02840d2a64f1663900f15b7c9f22a2 (diff) | |
download | riscv-opcodes-c7e17632237219090791ba67dd700c2fca432e20.zip riscv-opcodes-c7e17632237219090791ba67dd700c2fca432e20.tar.gz riscv-opcodes-c7e17632237219090791ba67dd700c2fca432e20.tar.bz2 |
Factor out opcodes into per-extension files
Diffstat (limited to 'opcodes-rv64q')
-rw-r--r-- | opcodes-rv64q | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/opcodes-rv64q b/opcodes-rv64q new file mode 100644 index 0000000..571edf1 --- /dev/null +++ b/opcodes-rv64q @@ -0,0 +1,7 @@ +# RV64Q additions to RV32Q + +fcvt.l.q rd rs1 24..20=2 31..27=0x18 rm 26..25=3 6..2=0x14 1..0=3 +fcvt.lu.q rd rs1 24..20=3 31..27=0x18 rm 26..25=3 6..2=0x14 1..0=3 + +fcvt.q.l rd rs1 24..20=2 31..27=0x1A rm 26..25=3 6..2=0x14 1..0=3 +fcvt.q.lu rd rs1 24..20=3 31..27=0x1A rm 26..25=3 6..2=0x14 1..0=3 |