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| author | Ben Marshall <ben.marshall@bristol.ac.uk> | 2021-02-19 10:02:53 +0000 |
|---|---|---|
| committer | Ben Marshall <ben.marshall@bristol.ac.uk> | 2021-02-19 10:02:53 +0000 |
| commit | 9b802ad797cab9584c1fbdeeb9866eae92fa07e3 (patch) | |
| tree | 4bce097e817967d52b8e2962486ad151b3fb2ead /opcodes-rv64k | |
| parent | 03be826f17faedcaee7f60223f402850e254df0a (diff) | |
| download | riscv-opcodes-9b802ad797cab9584c1fbdeeb9866eae92fa07e3.zip riscv-opcodes-9b802ad797cab9584c1fbdeeb9866eae92fa07e3.tar.gz riscv-opcodes-9b802ad797cab9584c1fbdeeb9866eae92fa07e3.tar.bz2 | |
scalar-crypto: Add opcodes for RV32K, RV64K
- Adds opcodes for RV32 and RV64 scalar crypto.
- opcodes-rvk contains encodings which are for RV32 and RV64 base ISAs
- opcodes-rv32/64k contains encodings which are for RV32 or RV64
- parse_opcodes has been modified:
- Wnable instructions to be listed as either RV32 or RV64 only, allowing
these opcodes to overlap.
- The C backend has been modifed to emit the "DECLARE_RV32_ONLY" or
"DECLARE_RV64_ONLY" macros as needed.
- The other backends have not been modified, and may need to be in the
future.
On branch scalar-crypto
Changes to be committed:
modified: Makefile
new file: opcodes-rv32k
new file: opcodes-rv64k
new file: opcodes-rvk
modified: parse_opcodes
Diffstat (limited to 'opcodes-rv64k')
| -rw-r--r-- | opcodes-rv64k | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/opcodes-rv64k b/opcodes-rv64k new file mode 100644 index 0000000..5fbb2f5 --- /dev/null +++ b/opcodes-rv64k @@ -0,0 +1,22 @@ + +# +# This file contains opcode specifications for the RISC-V +# Scalar Cryptographic instruction set extension. +# These instructions appear in _only_ RV64. +# ------------------------------------------------------------ + +# Scalar AES - RV64 +aes64ks1i rd rs1 rcon 31..30=0 29..25=0b11000 24=1 14..12=0b001 6..0=0x13 +aes64im rd rs1 31..30=0 29..25=0b11000 24..20=0b0000 14..12=0b001 6..0=0x13 +aes64ks2 rd rs1 rs2 31..30=1 29..25=0b11111 14..12=0b000 6..0=0x33 +aes64esm rd rs1 rs2 31..30=0 29..25=0b11011 14..12=0b000 6..0=0x33 +aes64es rd rs1 rs2 31..30=0 29..25=0b11001 14..12=0b000 6..0=0x33 +aes64dsm rd rs1 rs2 31..30=0 29..25=0b11111 14..12=0b000 6..0=0x33 +aes64ds rd rs1 rs2 31..30=0 29..25=0b11101 14..12=0b000 6..0=0x33 + +# Scalar SHA512 - RV64 +sha512sum0 rd rs1 31..30=0 29..25=0b01000 24..20=0b00100 14..12=1 6..0=0x13 +sha512sum1 rd rs1 31..30=0 29..25=0b01000 24..20=0b00101 14..12=1 6..0=0x13 +sha512sig0 rd rs1 31..30=0 29..25=0b01000 24..20=0b00110 14..12=1 6..0=0x13 +sha512sig1 rd rs1 31..30=0 29..25=0b01000 24..20=0b00111 14..12=1 6..0=0x13 + |