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authorAndrew Waterman <andrew@sifive.com>2020-03-03 18:09:58 -0800
committerAndrew Waterman <andrew@sifive.com>2020-03-03 18:09:58 -0800
commitc7e17632237219090791ba67dd700c2fca432e20 (patch)
treef27522c5cb17b88ed7fd487f6e95dbefb8319fe9 /opcodes-rv64a
parent5d52b6321b02840d2a64f1663900f15b7c9f22a2 (diff)
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Factor out opcodes into per-extension files
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+# RV64A additions to RV32A
+
+amoadd.d rd rs1 rs2 aqrl 31..29=0 28..27=0 14..12=3 6..2=0x0B 1..0=3
+amoxor.d rd rs1 rs2 aqrl 31..29=1 28..27=0 14..12=3 6..2=0x0B 1..0=3
+amoor.d rd rs1 rs2 aqrl 31..29=2 28..27=0 14..12=3 6..2=0x0B 1..0=3
+amoand.d rd rs1 rs2 aqrl 31..29=3 28..27=0 14..12=3 6..2=0x0B 1..0=3
+amomin.d rd rs1 rs2 aqrl 31..29=4 28..27=0 14..12=3 6..2=0x0B 1..0=3
+amomax.d rd rs1 rs2 aqrl 31..29=5 28..27=0 14..12=3 6..2=0x0B 1..0=3
+amominu.d rd rs1 rs2 aqrl 31..29=6 28..27=0 14..12=3 6..2=0x0B 1..0=3
+amomaxu.d rd rs1 rs2 aqrl 31..29=7 28..27=0 14..12=3 6..2=0x0B 1..0=3
+amoswap.d rd rs1 rs2 aqrl 31..29=0 28..27=1 14..12=3 6..2=0x0B 1..0=3
+lr.d rd rs1 24..20=0 aqrl 31..29=0 28..27=2 14..12=3 6..2=0x0B 1..0=3
+sc.d rd rs1 rs2 aqrl 31..29=0 28..27=3 14..12=3 6..2=0x0B 1..0=3